DE69314544D1 - Methode zur Montage von Hybridschaltungen durch Vakuum-Verklebung - Google Patents

Methode zur Montage von Hybridschaltungen durch Vakuum-Verklebung

Info

Publication number
DE69314544D1
DE69314544D1 DE69314544T DE69314544T DE69314544D1 DE 69314544 D1 DE69314544 D1 DE 69314544D1 DE 69314544 T DE69314544 T DE 69314544T DE 69314544 T DE69314544 T DE 69314544T DE 69314544 D1 DE69314544 D1 DE 69314544D1
Authority
DE
Germany
Prior art keywords
hybrid circuits
vacuum bonding
assembling hybrid
assembling
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69314544T
Other languages
English (en)
Other versions
DE69314544T2 (de
Inventor
Paul Naudin
Stephane Hancali
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Original Assignee
Alcatel Alsthom Compagnie Generale dElectricite
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Alsthom Compagnie Generale dElectricite filed Critical Alcatel Alsthom Compagnie Generale dElectricite
Application granted granted Critical
Publication of DE69314544D1 publication Critical patent/DE69314544D1/de
Publication of DE69314544T2 publication Critical patent/DE69314544T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/14—Mounting supporting structure in casing or on frame or rack
    • H05K7/1417—Mounting supporting structure in casing or on frame or rack having securing means for mounting boards, plates or wiring boards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/068—Features of the lamination press or of the lamination process, e.g. using special separator sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/08—Treatments involving gases
    • H05K2203/085—Using vacuum or low pressure

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Combinations Of Printed Boards (AREA)
  • Adhesives Or Adhesive Processes (AREA)
DE1993614544 1992-06-02 1993-05-28 Methode zur Montage von Hybridschaltungen durch Vakuum-Verklebung Expired - Fee Related DE69314544T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9206653A FR2691871A1 (fr) 1992-06-02 1992-06-02 Procédé d'assemblage par collage sous vide des circuits hybrides et assemblages obtenus par ce procédé.

Publications (2)

Publication Number Publication Date
DE69314544D1 true DE69314544D1 (de) 1997-11-20
DE69314544T2 DE69314544T2 (de) 1998-02-12

Family

ID=9430345

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1993614544 Expired - Fee Related DE69314544T2 (de) 1992-06-02 1993-05-28 Methode zur Montage von Hybridschaltungen durch Vakuum-Verklebung

Country Status (3)

Country Link
EP (1) EP0574286B1 (de)
DE (1) DE69314544T2 (de)
FR (1) FR2691871A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101374390B (zh) * 2007-08-24 2011-03-30 富葵精密组件(深圳)有限公司 用于电路板导电胶填充的导气板及导电胶填充方法
DE102008006390A1 (de) * 2008-01-28 2009-07-30 Tesa Ag Verfahren zur Verklebung von flexiblen Leiterplatten mit Polymermaterialien zur partiellen oder vollständigen Versteifung

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4100589A (en) * 1975-07-17 1978-07-11 Harris Corporation Microcircuit device including hybrid circuit carrier
FR2642224B1 (fr) * 1989-01-25 1991-04-19 Siemens Bendix Automotive Elec Procede et dispositif de fixation d'un substrat de circuit electronique sur un support

Also Published As

Publication number Publication date
FR2691871A1 (fr) 1993-12-03
EP0574286B1 (de) 1997-10-15
DE69314544T2 (de) 1998-02-12
EP0574286A1 (de) 1993-12-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: ALCATEL, PARIS, FR

8339 Ceased/non-payment of the annual fee