DE69227539D1 - Dynamischer RAM-Speicher mit Möglichkeit einen Schreibe-/Lesesteuertypus zu bestimmen während der letzten Stufe des Herstellungsverfahrens - Google Patents

Dynamischer RAM-Speicher mit Möglichkeit einen Schreibe-/Lesesteuertypus zu bestimmen während der letzten Stufe des Herstellungsverfahrens

Info

Publication number
DE69227539D1
DE69227539D1 DE69227539T DE69227539T DE69227539D1 DE 69227539 D1 DE69227539 D1 DE 69227539D1 DE 69227539 T DE69227539 T DE 69227539T DE 69227539 T DE69227539 T DE 69227539T DE 69227539 D1 DE69227539 D1 DE 69227539D1
Authority
DE
Germany
Prior art keywords
ability
read
manufacturing process
type
write control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69227539T
Other languages
English (en)
Other versions
DE69227539T2 (de
Inventor
Tetsuya Aono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of DE69227539D1 publication Critical patent/DE69227539D1/de
Publication of DE69227539T2 publication Critical patent/DE69227539T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69227539T 1991-05-16 1992-02-27 Dynamischer RAM-Speicher mit Möglichkeit einen Schreibe-/Lesesteuertypus zu bestimmen während der letzten Stufe des Herstellungsverfahrens Expired - Fee Related DE69227539T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3111445A JP2715009B2 (ja) 1991-05-16 1991-05-16 ダイナミックランダムアクセスメモリ装置

Publications (2)

Publication Number Publication Date
DE69227539D1 true DE69227539D1 (de) 1998-12-17
DE69227539T2 DE69227539T2 (de) 1999-05-20

Family

ID=14561385

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69227539T Expired - Fee Related DE69227539T2 (de) 1991-05-16 1992-02-27 Dynamischer RAM-Speicher mit Möglichkeit einen Schreibe-/Lesesteuertypus zu bestimmen während der letzten Stufe des Herstellungsverfahrens

Country Status (5)

Country Link
US (1) US5226008A (de)
EP (1) EP0513968B1 (de)
JP (1) JP2715009B2 (de)
KR (1) KR950014251B1 (de)
DE (1) DE69227539T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0589663A (ja) * 1991-09-27 1993-04-09 Mitsubishi Electric Corp 半導体記憶装置およびその出力制御方法
US5412613A (en) * 1993-12-06 1995-05-02 International Business Machines Corporation Memory device having asymmetrical CAS to data input/output mapping and applications thereof
US5923829A (en) 1994-08-25 1999-07-13 Ricoh Company, Ltd. Memory system, memory control system and image processing system
US5657293A (en) * 1995-08-23 1997-08-12 Micron Technology, Inc. Integrated circuit memory with back end mode disable
KR0170905B1 (ko) * 1995-11-06 1999-03-30 김주용 디램
US5900021A (en) * 1997-04-04 1999-05-04 United Memories, Inc. Pad input select circuit for use with bond options
US6347394B1 (en) 1998-11-04 2002-02-12 Micron Technology, Inc. Buffering circuit embedded in an integrated circuit device module used for buffering clocks and other input signals

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2948159C2 (de) * 1979-11-29 1983-10-27 Siemens AG, 1000 Berlin und 8000 München Integrierter Speicherbaustein mit wählbaren Betriebsfunktionen
US5018101A (en) * 1987-09-16 1991-05-21 Hitachi, Ltd. Semiconductor memory
US4956811A (en) * 1987-09-16 1990-09-11 Hitachi, Ltd. Semiconductor memory

Also Published As

Publication number Publication date
US5226008A (en) 1993-07-06
DE69227539T2 (de) 1999-05-20
EP0513968A2 (de) 1992-11-19
JPH04339396A (ja) 1992-11-26
EP0513968A3 (en) 1993-06-30
JP2715009B2 (ja) 1998-02-16
KR920022297A (ko) 1992-12-19
KR950014251B1 (ko) 1995-11-23
EP0513968B1 (de) 1998-11-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee