IT1149263B - Memoria ad accesso multiplo - Google Patents

Memoria ad accesso multiplo

Info

Publication number
IT1149263B
IT1149263B IT25969/80A IT2596980A IT1149263B IT 1149263 B IT1149263 B IT 1149263B IT 25969/80 A IT25969/80 A IT 25969/80A IT 2596980 A IT2596980 A IT 2596980A IT 1149263 B IT1149263 B IT 1149263B
Authority
IT
Italy
Prior art keywords
access memory
multiple access
memory
access
Prior art date
Application number
IT25969/80A
Other languages
English (en)
Other versions
IT8025969A0 (it
Inventor
Eugene Stewart Schlig
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT8025969A0 publication Critical patent/IT8025969A0/it
Application granted granted Critical
Publication of IT1149263B publication Critical patent/IT1149263B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
IT25969/80A 1979-12-07 1980-11-14 Memoria ad accesso multiplo IT1149263B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/101,390 US4280197A (en) 1979-12-07 1979-12-07 Multiple access store

Publications (2)

Publication Number Publication Date
IT8025969A0 IT8025969A0 (it) 1980-11-14
IT1149263B true IT1149263B (it) 1986-12-03

Family

ID=22284404

Family Applications (1)

Application Number Title Priority Date Filing Date
IT25969/80A IT1149263B (it) 1979-12-07 1980-11-14 Memoria ad accesso multiplo

Country Status (5)

Country Link
US (1) US4280197A (it)
EP (1) EP0031009B1 (it)
JP (1) JPS5849951B2 (it)
DE (1) DE3064712D1 (it)
IT (1) IT1149263B (it)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3070394D1 (en) * 1980-11-26 1985-05-02 Ibm Deutschland Multiple-address highly integrated semi-conductor memory
US4554645A (en) * 1983-03-10 1985-11-19 International Business Machines Corporation Multi-port register implementation
US4616310A (en) * 1983-05-20 1986-10-07 International Business Machines Corporation Communicating random access memory
US4623990A (en) * 1984-10-31 1986-11-18 Advanced Micro Devices, Inc. Dual-port read/write RAM with single array
US4742487A (en) * 1986-04-15 1988-05-03 International Business Machines Corporation Inhibit and transfer circuitry for memory cell being read from multiple ports
JPH07111837B2 (ja) * 1988-10-19 1995-11-29 株式会社東芝 不揮発性半導体メモリ
US4991138A (en) * 1989-04-03 1991-02-05 International Business Machines Corporation High speed memory cell with multiple port capability
KR100538734B1 (ko) * 2002-11-04 2005-12-23 이청석 이형소재 용접용 시임 용접장치

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3354440A (en) * 1965-04-19 1967-11-21 Ibm Nondestructive memory array
NL6908154A (it) * 1969-05-29 1970-12-01
US3643236A (en) * 1969-12-19 1972-02-15 Ibm Storage having a plurality of simultaneously accessible locations
US3675218A (en) * 1970-01-15 1972-07-04 Ibm Independent read-write monolithic memory array
US3761898A (en) * 1971-03-05 1973-09-25 Raytheon Co Random access memory
GB1565146A (en) * 1976-08-16 1980-04-16 Fairchild Camera Instr Co Random access momory cells
US4125877A (en) * 1976-11-26 1978-11-14 Motorola, Inc. Dual port random access memory storage cell
US4070657A (en) * 1977-01-03 1978-01-24 Honeywell Information Systems Inc. Current mode simultaneous dual-read/single-write memory device
US4127899A (en) * 1977-12-05 1978-11-28 International Business Machines Corporation Self-quenching memory cell
US4193127A (en) * 1979-01-02 1980-03-11 International Business Machines Corporation Simultaneous read/write cell

Also Published As

Publication number Publication date
IT8025969A0 (it) 1980-11-14
US4280197A (en) 1981-07-21
DE3064712D1 (en) 1983-10-06
JPS5683884A (en) 1981-07-08
JPS5849951B2 (ja) 1983-11-08
EP0031009A1 (en) 1981-07-01
EP0031009B1 (en) 1983-08-31

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