DE69225638D1 - Abrundungsschaltung in einem Gleitkommamultiplizierer - Google Patents

Abrundungsschaltung in einem Gleitkommamultiplizierer

Info

Publication number
DE69225638D1
DE69225638D1 DE69225638T DE69225638T DE69225638D1 DE 69225638 D1 DE69225638 D1 DE 69225638D1 DE 69225638 T DE69225638 T DE 69225638T DE 69225638 T DE69225638 T DE 69225638T DE 69225638 D1 DE69225638 D1 DE 69225638D1
Authority
DE
Germany
Prior art keywords
floating point
point multiplier
rounding circuit
rounding
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69225638T
Other languages
English (en)
Other versions
DE69225638T2 (de
Inventor
Grzegorz B Zyner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of DE69225638D1 publication Critical patent/DE69225638D1/de
Publication of DE69225638T2 publication Critical patent/DE69225638T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/487—Multiplying; Dividing
    • G06F7/4876—Multiplying
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow
    • G06F7/49915—Mantissa overflow or underflow in handling floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Complex Calculations (AREA)
DE69225638T 1991-05-03 1992-04-07 Abrundungsschaltung in einem Gleitkommamultiplizierer Expired - Fee Related DE69225638T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/695,423 US5150319A (en) 1991-05-03 1991-05-03 Circuitry for rounding in a floating point multiplier

Publications (2)

Publication Number Publication Date
DE69225638D1 true DE69225638D1 (de) 1998-07-02
DE69225638T2 DE69225638T2 (de) 1999-01-28

Family

ID=24792917

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69225638T Expired - Fee Related DE69225638T2 (de) 1991-05-03 1992-04-07 Abrundungsschaltung in einem Gleitkommamultiplizierer

Country Status (5)

Country Link
US (1) US5150319A (de)
EP (1) EP0512686B1 (de)
JP (1) JP3306497B2 (de)
KR (1) KR950006582B1 (de)
DE (1) DE69225638T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5218564A (en) * 1991-06-07 1993-06-08 National Semiconductor Corporation Layout efficient 32-bit shifter/register with 16-bit interface
JPH06348455A (ja) * 1993-06-14 1994-12-22 Matsushita Electric Ind Co Ltd 乗算における丸め込み方法及び乗算回路
US5430668A (en) * 1994-03-07 1995-07-04 Nec Corporation Floating point multiplier capable of easily performing a failure detection test
US5790446A (en) * 1995-07-05 1998-08-04 Sun Microsystems, Inc. Floating point multiplier with reduced critical paths using delay matching techniques
KR100290906B1 (ko) * 1998-03-10 2001-07-12 김영환 부동소수점곱셈기에서반올림과덧셈을동시에수행하는장치및방법
US20080028014A1 (en) * 2006-07-26 2008-01-31 Hilt Jason W N-BIT 2's COMPLEMENT SYMMETRIC ROUNDING METHOD AND LOGIC FOR IMPLEMENTING THE SAME
US9489174B2 (en) * 2014-09-26 2016-11-08 Imagination Technologies Limited Rounding floating point numbers
CN109634555B (zh) * 2018-12-19 2022-11-01 深圳信息职业技术学院 一种基于注入值的浮点加法尾数快速舍入方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4849923A (en) * 1986-06-27 1989-07-18 Digital Equipment Corporation Apparatus and method for execution of floating point operations
US4922446A (en) * 1988-04-01 1990-05-01 Digital Equipment Corporation Apparatus and method for floating point normalization prediction
US4972362A (en) * 1988-06-17 1990-11-20 Bipolar Integrated Technology, Inc. Method and apparatus for implementing binary multiplication using booth type multiplication
US5027308A (en) * 1989-02-14 1991-06-25 Intel Corporation Circuit for adding/subtracting two floating point operands
US4926370A (en) * 1989-04-17 1990-05-15 International Business Machines Corporation Method and apparatus for processing postnormalization and rounding in parallel
US4941120A (en) * 1989-04-17 1990-07-10 International Business Machines Corporation Floating point normalization and rounding prediction circuit
US4977535A (en) * 1989-12-08 1990-12-11 Motorola, Inc. Method of computation of normalized numbers

Also Published As

Publication number Publication date
KR920022667A (ko) 1992-12-19
DE69225638T2 (de) 1999-01-28
EP0512686B1 (de) 1998-05-27
JPH05150948A (ja) 1993-06-18
JP3306497B2 (ja) 2002-07-24
KR950006582B1 (ko) 1995-06-19
EP0512686A2 (de) 1992-11-11
EP0512686A3 (en) 1993-05-19
US5150319A (en) 1992-09-22

Similar Documents

Publication Publication Date Title
ES533913A0 (es) Perfeccionamientos en un cateter
MX162081A (es) Mejoras en un equipo de refrigeracion
DE68927121D1 (de) Absolutwertberechnende Schaltung mit einem einzigen Addierer
ES520127A0 (es) Perfeccionamientos en un dispositivo fotovoltaico
GB2087609B (en) A floating point type multiplier circuit
DE69325476T2 (de) Abrundungsschaltung
DE69223003D1 (de) Vielfachkanalschnittstelle in einem Mikrocomputer
ES526439A0 (es) Perfeccionamientos en pistolas
ES284564Y (es) Perfeccionamientos en un elemento de muro
ES550545A0 (es) Perfeccionamientos en un dispositivo de amarre
ES555910A0 (es) Perfeccionamientos en un alojamiento gasostatico
MX162200A (es) Mejoras en un equipo de refrigeracion
DE69225638D1 (de) Abrundungsschaltung in einem Gleitkommamultiplizierer
ES548839A0 (es) Mejoras introducidas en un bigudi flexible
ATA77986A (de) Schiebereinheit in einem schiebeverschluss
EP0096847A3 (en) Dipole arrangement in a casing
DE3381064D1 (de) Pufferspeicher mit einem swappingschaltkreis.
MX159480A (es) Mejoras en un dispositivo de restriccion de carga
ES551116A0 (es) Perfeccionamientos en un disyuntor
ES551117A0 (es) Perfeccionamientos en un disyuntor
KR900006852A (ko) 승산회로
ES524960A0 (es) Perfeccionamientos en un conmutador electronico de tiempo
DE69433525D1 (de) Verzögerungsschaltung mit einem digitalen Speicher
DE69028493D1 (de) Filmzuführvorrichtung in einem Photoapparat
ES532210A0 (es) Perfeccionamientos en un controlador de frecuencia variable

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee