DE69130595T2 - Verfahren zur Herstellung einer Metallschicht - Google Patents

Verfahren zur Herstellung einer Metallschicht

Info

Publication number
DE69130595T2
DE69130595T2 DE69130595T DE69130595T DE69130595T2 DE 69130595 T2 DE69130595 T2 DE 69130595T2 DE 69130595 T DE69130595 T DE 69130595T DE 69130595 T DE69130595 T DE 69130595T DE 69130595 T2 DE69130595 T2 DE 69130595T2
Authority
DE
Germany
Prior art keywords
producing
metal layer
monocrystalline
metal film
aluminum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69130595T
Other languages
English (en)
Other versions
DE69130595D1 (de
Inventor
Kazuo Tsubouchi
Kazuya Masu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2177555A external-priority patent/JP2763659B2/ja
Priority claimed from JP2177554A external-priority patent/JP2763658B2/ja
Application filed by Individual filed Critical Individual
Publication of DE69130595D1 publication Critical patent/DE69130595D1/de
Application granted granted Critical
Publication of DE69130595T2 publication Critical patent/DE69130595T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physical Vapour Deposition (AREA)
  • Laminated Bodies (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE69130595T 1990-07-06 1991-07-05 Verfahren zur Herstellung einer Metallschicht Expired - Lifetime DE69130595T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2177555A JP2763659B2 (ja) 1990-07-06 1990-07-06 金属薄膜形成法
JP2177554A JP2763658B2 (ja) 1990-07-06 1990-07-06 金属薄膜形成法

Publications (2)

Publication Number Publication Date
DE69130595D1 DE69130595D1 (de) 1999-01-21
DE69130595T2 true DE69130595T2 (de) 1999-05-27

Family

ID=26498066

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69130595T Expired - Lifetime DE69130595T2 (de) 1990-07-06 1991-07-05 Verfahren zur Herstellung einer Metallschicht

Country Status (7)

Country Link
US (1) US5208187A (de)
EP (1) EP0465264B1 (de)
KR (1) KR950005257B1 (de)
CN (1) CN1056015C (de)
AT (1) ATE174450T1 (de)
DE (1) DE69130595T2 (de)
MY (1) MY107855A (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
PT95232B (pt) * 1989-09-09 1998-06-30 Canon Kk Processo de producao de uma pelicula de aluminio depositada
EP0420597B1 (de) * 1989-09-26 1996-04-24 Canon Kabushiki Kaisha Verfahren zur Herstellung einer abgeschiedenen Schicht unter Verwendung von Alkylaluminiumhydrid und Verfahren zur Herstellung eines Halbleiterbauelements
EP0498580A1 (de) * 1991-02-04 1992-08-12 Canon Kabushiki Kaisha Verfahren zur Herstellung einer abgeschiedenen Metallschicht, die Aluminium enthält, mit Anwendung von Alkylaluminiumhalid
JPH0521385A (ja) * 1991-07-10 1993-01-29 Nippon Steel Corp アルミニウム合金薄膜の製造方法
JP3048749B2 (ja) * 1992-04-28 2000-06-05 キヤノン株式会社 薄膜形成方法
US5288665A (en) * 1992-08-12 1994-02-22 Applied Materials, Inc. Process for forming low resistance aluminum plug in via electrically connected to overlying patterned metal layer for integrated circuit structures
US6001461A (en) * 1992-08-27 1999-12-14 Kabushiki Kaisha Toshiba Electronic parts and manufacturing method thereof
US5709958A (en) * 1992-08-27 1998-01-20 Kabushiki Kaisha Toshiba Electronic parts
DE69322233T2 (de) * 1992-08-27 1999-07-08 Toshiba Kawasaki Kk Elektronisches Teil mit metallischen Leiterbahnen und Verfahren zu seiner Herstellung
US5472911A (en) * 1994-09-02 1995-12-05 Motorola, Inc. Method for controlling electromigration and electrically conductive interconnect structure therefor
JP3695606B2 (ja) * 1996-04-01 2005-09-14 忠弘 大見 半導体装置及びその製造方法
US5841179A (en) * 1996-08-28 1998-11-24 Advanced Micro Devices, Inc. Conductive layer with anti-reflective surface portion
WO2002080244A2 (en) * 2001-02-12 2002-10-10 Asm America, Inc. Improved process for deposition of semiconductor films
TW552645B (en) * 2001-08-03 2003-09-11 Semiconductor Energy Lab Laser irradiating device, laser irradiating method and manufacturing method of semiconductor device
US6847006B2 (en) * 2001-08-10 2005-01-25 Semiconductor Energy Laboratory Co., Ltd. Laser annealing apparatus and semiconductor device manufacturing method
JP4397571B2 (ja) * 2001-09-25 2010-01-13 株式会社半導体エネルギー研究所 レーザ照射方法およびレーザ照射装置、並びに半導体装置の作製方法
US6750423B2 (en) * 2001-10-25 2004-06-15 Semiconductor Energy Laboratory Co., Ltd. Laser irradiation method, laser irradiation apparatus, and method of manufacturing a semiconductor device
JP2004303790A (ja) * 2003-03-28 2004-10-28 Toshiba Corp 半導体装置
US6932865B2 (en) * 2003-04-11 2005-08-23 Lockheed Martin Corporation System and method of making single-crystal structures through free-form fabrication techniques
CN101238095B (zh) * 2005-08-04 2011-08-10 东曹株式会社 含有金属的化合物,其制备方法、含有金属的薄膜和其形成方法
US7732241B2 (en) 2005-11-30 2010-06-08 Semiconductor Energy Labortory Co., Ltd. Microstructure and manufacturing method thereof and microelectromechanical system
US7485560B2 (en) * 2006-11-22 2009-02-03 Atomic Energy Council - Institute Of Nuclear Energy Research Method for fabricating crystalline silicon thin films
JP5745205B2 (ja) * 2008-08-22 2015-07-08 木村　光照 加熱励振を利用した熱伝導型気圧センサ
EP2322314A1 (de) * 2009-11-16 2011-05-18 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Einkristallines Schweissen von direktional verfestigten Werkstoffen
CN108796601A (zh) * 2017-05-02 2018-11-13 上海奇谋能源技术开发有限公司 一种生产单晶金属的方法
US20210254237A1 (en) * 2020-02-19 2021-08-19 Jagannathan Rajagopalan Synthesis of single crystal films on amorphous substrates

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2571544B1 (fr) * 1984-10-05 1987-07-31 Haond Michel Procede de fabrication d'ilots de silicium monocristallin isoles electriquement les uns des autres
JPS62123716A (ja) * 1985-11-22 1987-06-05 Nec Corp 半導体装置の製造方法
JPS62293740A (ja) * 1986-06-13 1987-12-21 Fujitsu Ltd 半導体装置の製造方法
JP2735177B2 (ja) * 1986-08-18 1998-04-02 富士通株式会社 薄膜トランジスタ及びその製造方法
JPH01109716A (ja) * 1987-10-22 1989-04-26 Oki Electric Ind Co Ltd 半導体装置のコンタクト形成方法
JPH01120035A (ja) * 1987-11-02 1989-05-12 Nec Corp 半導体装置及びその製造方法
JPH01251740A (ja) * 1988-03-31 1989-10-06 Seiko Epson Corp 半導体集積回路装置の製造方法
JP2726118B2 (ja) * 1989-09-26 1998-03-11 キヤノン株式会社 堆積膜形成法

Also Published As

Publication number Publication date
EP0465264A3 (en) 1992-08-05
KR950005257B1 (ko) 1995-05-22
DE69130595D1 (de) 1999-01-21
CN1056015C (zh) 2000-08-30
CN1060558A (zh) 1992-04-22
MY107855A (en) 1996-06-29
EP0465264A2 (de) 1992-01-08
EP0465264B1 (de) 1998-12-09
ATE174450T1 (de) 1998-12-15
US5208187A (en) 1993-05-04

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