DE69129477D1 - Unterbrechungsverarbeitungszuordnung in einem Mehrprozessorsystem - Google Patents
Unterbrechungsverarbeitungszuordnung in einem MehrprozessorsystemInfo
- Publication number
- DE69129477D1 DE69129477D1 DE69129477T DE69129477T DE69129477D1 DE 69129477 D1 DE69129477 D1 DE 69129477D1 DE 69129477 T DE69129477 T DE 69129477T DE 69129477 T DE69129477 T DE 69129477T DE 69129477 D1 DE69129477 D1 DE 69129477D1
- Authority
- DE
- Germany
- Prior art keywords
- interrupt processing
- multiprocessor system
- processing mapping
- mapping
- multiprocessor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
- G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
- G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/533,192 US5179707A (en) | 1990-06-01 | 1990-06-01 | Interrupt processing allocation in a multiprocessor system |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69129477D1 true DE69129477D1 (de) | 1998-07-02 |
DE69129477T2 DE69129477T2 (de) | 1999-02-18 |
Family
ID=24124890
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69129477T Expired - Fee Related DE69129477T2 (de) | 1990-06-01 | 1991-05-24 | Unterbrechungsverarbeitungszuordnung in einem Mehrprozessorsystem |
Country Status (5)
Country | Link |
---|---|
US (1) | US5179707A (de) |
EP (1) | EP0459714B1 (de) |
JP (1) | JPH04232558A (de) |
DE (1) | DE69129477T2 (de) |
ES (1) | ES2116995T3 (de) |
Families Citing this family (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5613128A (en) * | 1990-12-21 | 1997-03-18 | Intel Corporation | Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller |
US5495615A (en) * | 1990-12-21 | 1996-02-27 | Intel Corp | Multiprocessor interrupt controller with remote reading of interrupt control registers |
US5410710A (en) * | 1990-12-21 | 1995-04-25 | Intel Corporation | Multiprocessor programmable interrupt controller system adapted to functional redundancy checking processor systems |
JP2855298B2 (ja) * | 1990-12-21 | 1999-02-10 | インテル・コーポレーション | 割込み要求の仲裁方法およびマルチプロセッサシステム |
US5555420A (en) * | 1990-12-21 | 1996-09-10 | Intel Corporation | Multiprocessor programmable interrupt controller system with separate interrupt bus and bus retry management |
JPH04246763A (ja) * | 1991-01-31 | 1992-09-02 | Nec Corp | マルチプロセッサ回路 |
JP2625589B2 (ja) * | 1991-04-22 | 1997-07-02 | インターナショナル・ビジネス・マシーンズ・コーポレイション | マルチプロセッサ・システム |
EP0602858A1 (de) * | 1992-12-18 | 1994-06-22 | International Business Machines Corporation | Vorrichtung und Verfahren zur Unterbrechungsbedienung in einem Mehrrechnersystem |
GB2277388B (en) * | 1993-04-19 | 1997-08-13 | Intel Corp | Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller |
US5381541A (en) * | 1993-05-26 | 1995-01-10 | International Business Machines Corp. | Computer system having planar board with single interrupt controller and processor card with plural processors and interrupt director |
JPH07105023A (ja) * | 1993-09-20 | 1995-04-21 | Internatl Business Mach Corp <Ibm> | データ処理システム内でスプリアス割込みを検出するための方法及び装置 |
CA2123447C (en) * | 1993-09-20 | 1999-02-16 | Richard L. Arndt | Scalable system interrupt structure for a multiprocessing system |
SG67906A1 (en) * | 1993-12-16 | 1999-10-19 | Intel Corp | Multiple programmable interrupt controllers in a multi-processor system |
KR960042387A (ko) * | 1995-05-31 | 1996-12-21 | 유기범 | 하이파이플러스 인터럽트버스 중재방법 |
US5802350A (en) * | 1996-01-18 | 1998-09-01 | International Business Machines Corporation | System and method for selecting an interrupt system based upon the operating system of a multiprocessor system |
US5848277A (en) * | 1996-02-12 | 1998-12-08 | Ford Motor Company | Method for providing both level-sensitive and edge-sensitive interrupt signals on a serial interface between a peripheral and host |
US5905897A (en) * | 1997-03-20 | 1999-05-18 | Industrial Technology Research Institute | Method and apparatus for selecting a nonblocked interrupt request |
US6003109A (en) * | 1997-08-15 | 1999-12-14 | Lsi Logic Corporation | Method and apparatus for processing interrupts in a data processing system |
US6189065B1 (en) * | 1998-09-28 | 2001-02-13 | International Business Machines Corporation | Method and apparatus for interrupt load balancing for powerPC processors |
US6701429B1 (en) * | 1998-12-03 | 2004-03-02 | Telefonaktiebolaget Lm Ericsson(Publ) | System and method of start-up in efficient way for multi-processor systems based on returned identification information read from pre-determined memory location |
US6606676B1 (en) * | 1999-11-08 | 2003-08-12 | International Business Machines Corporation | Method and apparatus to distribute interrupts to multiple interrupt handlers in a distributed symmetric multiprocessor system |
US6859851B1 (en) * | 1999-12-20 | 2005-02-22 | Intel Corporation | Buffer pre-loading for memory service interruptions |
US6535942B1 (en) | 2000-02-09 | 2003-03-18 | Telefonaktiebolaget L M Ericsson (Publ) | Method for reducing processor interrupt load |
US6813665B2 (en) * | 2001-09-21 | 2004-11-02 | Intel Corporation | Interrupt method, system and medium |
US7328294B2 (en) * | 2001-12-03 | 2008-02-05 | Sun Microsystems, Inc. | Methods and apparatus for distributing interrupts |
US20040111549A1 (en) * | 2002-12-10 | 2004-06-10 | Intel Corporation | Method, system, and program for improved interrupt processing |
US7529875B2 (en) * | 2003-08-20 | 2009-05-05 | International Business Machines Corporation | Assigning interrupts for input/output (I/O) devices among nodes of a non-uniform memory access (NUMA) system |
US7222200B2 (en) * | 2004-10-14 | 2007-05-22 | Dell Products L.P. | Method for synchronizing processors in SMI following a memory hot plug event |
US20060112208A1 (en) * | 2004-11-22 | 2006-05-25 | International Business Machines Corporation | Interrupt thresholding for SMT and multi processor systems |
US8386684B2 (en) | 2007-12-12 | 2013-02-26 | Nxp B.V. | Data processing system and method of interrupt handling |
US7707344B2 (en) * | 2008-01-29 | 2010-04-27 | International Business Machines Corporation | Interrupt mitigation on multiple network adapters |
US8024504B2 (en) * | 2008-06-26 | 2011-09-20 | Microsoft Corporation | Processor interrupt determination |
US7996595B2 (en) * | 2009-04-14 | 2011-08-09 | Lstar Technologies Llc | Interrupt arbitration for multiprocessors |
US8321614B2 (en) * | 2009-04-24 | 2012-11-27 | Empire Technology Development Llc | Dynamic scheduling interrupt controller for multiprocessors |
US8260996B2 (en) * | 2009-04-24 | 2012-09-04 | Empire Technology Development Llc | Interrupt optimization for multiprocessors |
US8234431B2 (en) * | 2009-10-13 | 2012-07-31 | Empire Technology Development Llc | Interrupt masking for multi-core processors |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4080649A (en) * | 1976-12-16 | 1978-03-21 | Honeywell Information Systems Inc. | Balancing the utilization of I/O system processors |
US5067071A (en) * | 1985-02-27 | 1991-11-19 | Encore Computer Corporation | Multiprocessor computer system employing a plurality of tightly coupled processors with interrupt vector bus |
US4816990A (en) * | 1986-11-05 | 1989-03-28 | Stratus Computer, Inc. | Method and apparatus for fault-tolerant computer system having expandable processor section |
GB8815042D0 (en) * | 1988-06-24 | 1988-08-03 | Int Computers Ltd | Data processing apparatus |
-
1990
- 1990-06-01 US US07/533,192 patent/US5179707A/en not_active Expired - Lifetime
-
1991
- 1991-05-13 JP JP3135264A patent/JPH04232558A/ja active Pending
- 1991-05-24 ES ES91304719T patent/ES2116995T3/es not_active Expired - Lifetime
- 1991-05-24 EP EP91304719A patent/EP0459714B1/de not_active Expired - Lifetime
- 1991-05-24 DE DE69129477T patent/DE69129477T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
ES2116995T3 (es) | 1998-08-01 |
EP0459714A2 (de) | 1991-12-04 |
EP0459714A3 (en) | 1992-01-08 |
DE69129477T2 (de) | 1999-02-18 |
US5179707A (en) | 1993-01-12 |
EP0459714B1 (de) | 1998-05-27 |
JPH04232558A (ja) | 1992-08-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Free format text: V. BEZOLD & SOZIEN, 80799 MUENCHEN |
|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: TERADATA US, INC., MIAMISBURG, OHIO, US |
|
8339 | Ceased/non-payment of the annual fee |