DE69128565D1 - Mikrorechner ausgestattet mit einer DMA-Steuerung - Google Patents

Mikrorechner ausgestattet mit einer DMA-Steuerung

Info

Publication number
DE69128565D1
DE69128565D1 DE69128565T DE69128565T DE69128565D1 DE 69128565 D1 DE69128565 D1 DE 69128565D1 DE 69128565 T DE69128565 T DE 69128565T DE 69128565 T DE69128565 T DE 69128565T DE 69128565 D1 DE69128565 D1 DE 69128565D1
Authority
DE
Germany
Prior art keywords
dma controller
microcomputer equipped
microcomputer
dma
controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69128565T
Other languages
English (en)
Other versions
DE69128565T2 (de
Inventor
Katsumi Miura
Yuko Mitsuhira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69128565D1 publication Critical patent/DE69128565D1/de
Publication of DE69128565T2 publication Critical patent/DE69128565T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
DE69128565T 1990-06-25 1991-06-25 Mikrorechner ausgestattet mit einer DMA-Steuerung Expired - Fee Related DE69128565T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP16591590 1990-06-25
JP23741690 1990-09-07

Publications (2)

Publication Number Publication Date
DE69128565D1 true DE69128565D1 (de) 1998-02-12
DE69128565T2 DE69128565T2 (de) 1998-06-04

Family

ID=26490465

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69128565T Expired - Fee Related DE69128565T2 (de) 1990-06-25 1991-06-25 Mikrorechner ausgestattet mit einer DMA-Steuerung

Country Status (3)

Country Link
US (1) US5696989A (de)
EP (1) EP0464615B1 (de)
DE (1) DE69128565T2 (de)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69610450T2 (de) * 1995-03-13 2001-04-26 Sun Microsystems Inc Virtueller Ein/Ausgabeprozessor
US5961614A (en) 1995-05-08 1999-10-05 Apple Computer, Inc. System for data transfer through an I/O device using a memory access controller which receives and stores indication of a data status signal
JPH08307617A (ja) * 1995-05-10 1996-11-22 Canon Inc 通信装置
US6098121A (en) * 1996-12-03 2000-08-01 Matsushita Electric Industrial Co., Ltd. Data transfer apparatus with improved throughput due to reduced processing overhead in interrupt process
US6154793A (en) * 1997-04-30 2000-11-28 Zilog, Inc. DMA with dynamically assigned channels, flexible block boundary notification and recording, type code checking and updating, commands, and status reporting
US6282548B1 (en) * 1997-06-21 2001-08-28 Alexa Internet Automatically generate and displaying metadata as supplemental information concurrently with the web page, there being no link between web page and metadata
US6098115A (en) * 1998-04-08 2000-08-01 International Business Machines Corporation System for reducing storage access latency with accessing main storage and data bus simultaneously
GB9821800D0 (en) * 1998-10-06 1998-12-02 Sgs Thomson Microelectronics Data transfer
GB9821768D0 (en) 1998-10-06 1998-12-02 Sgs Thomson Microelectronics Data transfer
GB9821792D0 (en) 1998-10-06 1998-12-02 Sgs Thomson Microelectronics Data transfer
GB9821770D0 (en) 1998-10-06 1998-12-02 Sgs Thomson Microelectronics Data transfer
GB9821763D0 (en) 1998-10-06 1998-12-02 Sgs Thomson Microelectronics Data transfer
GB9821766D0 (en) 1998-10-06 1998-12-02 Sgs Thomson Microelectronics Data transfer
GB9821789D0 (en) 1998-10-06 1998-12-02 Sgs Thomson Microelectronics Jitter handling
US6314567B1 (en) * 1998-11-13 2001-11-06 Hewlett-Packard Company Apparatus and method for transferring state data when performing on-line replacement of a running program code and data
MY124066A (en) * 1998-12-25 2006-06-30 Sony Corp Information processing device and method, and program storage medium.
JP3614714B2 (ja) * 1999-06-16 2005-01-26 Ｎｅｃマイクロシステム株式会社 Ｄｍａ制御装置
US6449665B1 (en) 1999-10-14 2002-09-10 Lexmark International, Inc. Means for reducing direct memory access
KR100403620B1 (ko) * 2001-02-28 2003-10-30 삼성전자주식회사 채널 활용율을 높이는 통신 시스템 및 그 방법
US6813652B2 (en) * 2001-04-11 2004-11-02 Chelsio Communications, Inc. Reduced-overhead DMA
JP2003050774A (ja) * 2001-08-08 2003-02-21 Matsushita Electric Ind Co Ltd データ処理装置およびデータ転送方法
JP2003281078A (ja) * 2002-03-22 2003-10-03 Ricoh Co Ltd Ｄｍａコントローラ
KR101595043B1 (ko) 2008-09-18 2016-02-17 마벨 월드 트레이드 리미티드 적어도 부분적으로 부팅 동안에 어플리케이션들을 메모리에 프리로딩하는 방법
JP2010134858A (ja) * 2008-12-08 2010-06-17 Renesas Electronics Corp データ処理回路
JP5834182B2 (ja) * 2010-07-27 2015-12-16 パナソニックＩｐマネジメント株式会社 データ転送制御装置及びデータ転送制御方法
US20120054379A1 (en) * 2010-08-30 2012-03-01 Kafai Leung Low power multi-touch scan control system
US8719463B2 (en) 2010-11-16 2014-05-06 Taiwan Semiconductor Manufacturing Company, Ltd. Processor with tightly coupled smart memory unit
US9141394B2 (en) 2011-07-29 2015-09-22 Marvell World Trade Ltd. Switching between processor cache and random-access memory
US9436629B2 (en) * 2011-11-15 2016-09-06 Marvell World Trade Ltd. Dynamic boot image streaming
US9311228B2 (en) * 2012-04-04 2016-04-12 International Business Machines Corporation Power reduction in server memory system
US9575768B1 (en) 2013-01-08 2017-02-21 Marvell International Ltd. Loading boot code from multiple memories
US9736801B1 (en) 2013-05-20 2017-08-15 Marvell International Ltd. Methods and apparatus for synchronizing devices in a wireless data communication system
US9521635B1 (en) 2013-05-21 2016-12-13 Marvell International Ltd. Methods and apparatus for selecting a device to perform shared functionality in a deterministic and fair manner in a wireless data communication system
US9836306B2 (en) 2013-07-31 2017-12-05 Marvell World Trade Ltd. Parallelizing boot operations
US10979412B2 (en) 2016-03-08 2021-04-13 Nxp Usa, Inc. Methods and apparatus for secure device authentication

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5660933A (en) * 1979-10-22 1981-05-26 Nec Corp Information processor
JPS5789128A (en) * 1980-11-25 1982-06-03 Hitachi Ltd Controlling system for information interchange
EP0153764B1 (de) * 1984-03-02 1993-11-03 Nec Corporation Informationsverarbeitungseinheit mit Unterbrechungsfunktion
US4847750A (en) * 1986-02-13 1989-07-11 Intelligent Instrumentation, Inc. Peripheral DMA controller for data acquisition system
JPS6329868A (ja) * 1986-07-23 1988-02-08 Nec Corp Ｄｍａコントロ−ラ
JP2504512B2 (ja) * 1988-03-09 1996-06-05 富士通株式会社 Ｄｍａコントロ―ラ
JPH01237864A (ja) * 1988-03-18 1989-09-22 Fujitsu Ltd Ｄｍａ転送制御装置
JPH1050154A (ja) * 1996-08-01 1998-02-20 Sumitomo Wiring Syst Ltd ワイヤーハーネス組立用の電線支持具

Also Published As

Publication number Publication date
DE69128565T2 (de) 1998-06-04
EP0464615A3 (en) 1992-12-30
EP0464615B1 (de) 1998-01-07
EP0464615A2 (de) 1992-01-08
US5696989A (en) 1997-12-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee