DE69127013D1 - Unterbrechungssteuerschaltung und Mikrocomputersystem, das diese enthält - Google Patents

Unterbrechungssteuerschaltung und Mikrocomputersystem, das diese enthält

Info

Publication number
DE69127013D1
DE69127013D1 DE69127013T DE69127013T DE69127013D1 DE 69127013 D1 DE69127013 D1 DE 69127013D1 DE 69127013 T DE69127013 T DE 69127013T DE 69127013 T DE69127013 T DE 69127013T DE 69127013 D1 DE69127013 D1 DE 69127013D1
Authority
DE
Germany
Prior art keywords
control circuit
system containing
interrupt control
microcomputer system
microcomputer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69127013T
Other languages
English (en)
Other versions
DE69127013T2 (de
Inventor
Noritaka Egami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of DE69127013D1 publication Critical patent/DE69127013D1/de
Publication of DE69127013T2 publication Critical patent/DE69127013T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
DE1991627013 1990-04-25 1991-04-24 Unterbrechungssteuerschaltung und Mikrocomputersystem, das diese enthält Expired - Fee Related DE69127013T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10986990A JPH047641A (ja) 1990-04-25 1990-04-25 割込制御装置

Publications (2)

Publication Number Publication Date
DE69127013D1 true DE69127013D1 (de) 1997-09-04
DE69127013T2 DE69127013T2 (de) 1998-01-22

Family

ID=14521261

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1991627013 Expired - Fee Related DE69127013T2 (de) 1990-04-25 1991-04-24 Unterbrechungssteuerschaltung und Mikrocomputersystem, das diese enthält

Country Status (3)

Country Link
EP (1) EP0454096B1 (de)
JP (1) JPH047641A (de)
DE (1) DE69127013T2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6003109A (en) * 1997-08-15 1999-12-14 Lsi Logic Corporation Method and apparatus for processing interrupts in a data processing system

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4631670A (en) * 1984-07-11 1986-12-23 Ibm Corporation Interrupt level sharing
US4764893A (en) * 1985-04-26 1988-08-16 International Business Machines Corporation Noise-immune interrupt level sharing
JPS62267834A (ja) * 1986-05-15 1987-11-20 Matsushita Electric Ind Co Ltd マイクロコンピユ−タ
US4760516A (en) * 1986-11-25 1988-07-26 Dialogic Corporation Peripheral interrupt interface for multiple access to an interrupt level
JPS63316236A (ja) * 1987-06-19 1988-12-23 Nec Corp 割込制御回路
CA1319441C (en) * 1988-09-09 1993-06-22 Paul R. Culley Programmable interrupt controller

Also Published As

Publication number Publication date
JPH047641A (ja) 1992-01-13
DE69127013T2 (de) 1998-01-22
EP0454096A2 (de) 1991-10-30
EP0454096B1 (de) 1997-07-30
EP0454096A3 (en) 1992-05-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee