DE69124194D1 - Bustreiberschaltung - Google Patents
BustreiberschaltungInfo
- Publication number
- DE69124194D1 DE69124194D1 DE69124194T DE69124194T DE69124194D1 DE 69124194 D1 DE69124194 D1 DE 69124194D1 DE 69124194 T DE69124194 T DE 69124194T DE 69124194 T DE69124194 T DE 69124194T DE 69124194 D1 DE69124194 D1 DE 69124194D1
- Authority
- DE
- Germany
- Prior art keywords
- driver circuit
- bus driver
- bus
- circuit
- driver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
- H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
- H03K19/09429—Multistate logic one of the states being the high impedance or floating state
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
- H04L25/03834—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using pulse shaping
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Logic Circuits (AREA)
- Static Random-Access Memory (AREA)
- Information Transfer Systems (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/608,788 US5179299A (en) | 1990-11-05 | 1990-11-05 | Cmos low output voltage bus driver |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69124194D1 true DE69124194D1 (de) | 1997-02-27 |
DE69124194T2 DE69124194T2 (de) | 1997-09-04 |
Family
ID=24438007
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69124194T Expired - Fee Related DE69124194T2 (de) | 1990-11-05 | 1991-10-29 | Bustreiberschaltung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5179299A (de) |
EP (1) | EP0485102B1 (de) |
JP (1) | JPH052558A (de) |
DE (1) | DE69124194T2 (de) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5341046A (en) * | 1992-12-07 | 1994-08-23 | Ncr Corporation | Threshold controlled input circuit for an integrated circuit |
US5432467A (en) * | 1993-05-07 | 1995-07-11 | Altera Corporation | Programmable logic device with low power voltage level translator |
KR0137108B1 (en) * | 1993-06-25 | 1998-06-15 | Hitachi Ltd | Bus driving system and integrated circuit device using the same |
US5457433A (en) * | 1993-08-25 | 1995-10-10 | Motorola, Inc. | Low-power inverter for crystal oscillator buffer or the like |
US5399920A (en) * | 1993-11-09 | 1995-03-21 | Texas Instruments Incorporated | CMOS driver which uses a higher voltage to compensate for threshold loss of the pull-up NFET |
JPH07235952A (ja) * | 1993-12-28 | 1995-09-05 | Oki Electric Ind Co Ltd | 信号伝送回路およびその回路を用いた信号伝送装置 |
US5548229A (en) * | 1993-12-28 | 1996-08-20 | Matsushita Electric Industrial Co., Ltd. | Tri-state output buffer circuit |
US5514979A (en) * | 1994-11-28 | 1996-05-07 | Unisys Corporation | Methods and apparatus for dynamically reducing ringing of driver output signal |
FR2730367A1 (fr) * | 1995-02-08 | 1996-08-09 | Bull Sa | Coupleur d'entree sortie de circuit integre |
US5629634A (en) * | 1995-08-21 | 1997-05-13 | International Business Machines Corporation | Low-power, tristate, off-chip driver circuit |
WO1997009811A1 (en) * | 1995-09-06 | 1997-03-13 | Advanced Micro Devices, Inc. | Low jitter low power single ended driver |
US5752048A (en) * | 1996-02-12 | 1998-05-12 | Motorola, Inc. | Device and method for providing a simulation of an idle UART to prevent computer lockup |
US6310489B1 (en) * | 1996-04-30 | 2001-10-30 | Sun Microsystems, Inc. | Method to reduce wire-or glitch in high performance bus design to improve bus performance |
US5781034A (en) * | 1996-07-11 | 1998-07-14 | Cypress Semiconductor Corporation | Reduced output swing with p-channel pullup diode connected |
US5844425A (en) * | 1996-07-19 | 1998-12-01 | Quality Semiconductor, Inc. | CMOS tristate output buffer with having overvoltage protection and increased stability against bus voltage variations |
JP3712476B2 (ja) * | 1996-10-02 | 2005-11-02 | 富士通株式会社 | 信号伝送システム及び半導体装置 |
US5914617A (en) * | 1996-12-23 | 1999-06-22 | Lsi Logic Corporation | Output driver for sub-micron CMOS |
AU7367698A (en) * | 1997-05-07 | 1998-11-27 | California Micro Devices Corporation | Active termination circuit and method therefor |
US5994918A (en) * | 1997-08-29 | 1999-11-30 | Hewlett-Packard Co. | Zero delay regenerative circuit for noise suppression on a computer data bus |
US6181165B1 (en) * | 1998-03-09 | 2001-01-30 | Siemens Aktiengesellschaft | Reduced voltage input/reduced voltage output tri-state buffers |
US6307397B1 (en) * | 1998-03-09 | 2001-10-23 | Infineontechnologies Ag | Reduced voltage input/reduced voltage output repeaters for high capacitance signal lines and methods therefor |
US6313663B1 (en) * | 1998-03-09 | 2001-11-06 | Infineon Technologies Ag | Full swing voltage input/full swing output bi-directional repeaters for high resistance or high capacitance bi-directional signal lines and methods therefor |
US6359471B1 (en) * | 1998-03-09 | 2002-03-19 | Infineon Technologies North America Corp. | Mixed swing voltage repeaters for high resistance or high capacitance signal lines and methods therefor |
US6225819B1 (en) | 1998-03-17 | 2001-05-01 | Cypress Semiconductor Corp. | Transmission line impedance matching output buffer |
JP3423267B2 (ja) * | 2000-01-27 | 2003-07-07 | 寛治 大塚 | ドライバ回路、レシーバ回路、および信号伝送バスシステム |
US6507218B1 (en) * | 2000-03-31 | 2003-01-14 | Intel Corporation | Method and apparatus for reducing back-to-back voltage glitch on high speed data bus |
US6384621B1 (en) | 2001-02-22 | 2002-05-07 | Cypress Semiconductor Corp. | Programmable transmission line impedance matching circuit |
US7888962B1 (en) | 2004-07-07 | 2011-02-15 | Cypress Semiconductor Corporation | Impedance matching circuit |
US7292073B2 (en) * | 2005-05-30 | 2007-11-06 | Freescale Semiconductor, Inc. | Transmission line driver circuit |
US8036846B1 (en) | 2005-10-20 | 2011-10-11 | Cypress Semiconductor Corporation | Variable impedance sense architecture and method |
JP5348070B2 (ja) | 2010-05-27 | 2013-11-20 | 株式会社デンソー | 車両のエンジン制御装置 |
US8159862B2 (en) | 2010-07-26 | 2012-04-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Recycling charges |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4029971A (en) * | 1976-02-13 | 1977-06-14 | Rca Corporation | Tri-state logic circuit |
US4217502A (en) * | 1977-09-10 | 1980-08-12 | Tokyo Shibaura Denki Kabushiki Kaisha | Converter producing three output states |
US4329600A (en) * | 1979-10-15 | 1982-05-11 | Rca Corporation | Overload protection circuit for output driver |
US4531068A (en) * | 1983-09-19 | 1985-07-23 | International Business Machines Corporation | Bus line precharging tristate driver circuit |
US4488067A (en) * | 1983-09-19 | 1984-12-11 | International Business Machines Corporation | Tristate driver circuit with low standby power consumption |
US4814646A (en) * | 1985-03-22 | 1989-03-21 | Monolithic Memories, Inc. | Programmable logic array using emitter-coupled logic |
US4638187A (en) * | 1985-10-01 | 1987-01-20 | Vtc Incorporated | CMOS output buffer providing high drive current with minimum output signal distortion |
US4682050A (en) * | 1986-01-08 | 1987-07-21 | International Business Machines Corporation | Small signal swing driver circuit |
US4766334A (en) * | 1986-03-07 | 1988-08-23 | The Singer Company | Level clamp for Tri-state CMOS bus structure |
US4947063A (en) * | 1987-10-09 | 1990-08-07 | Western Digital Corporation | Method and apparatus for reducing transient noise in integrated circuits |
US4782250A (en) * | 1987-08-31 | 1988-11-01 | International Business Machines Corporation | CMOS off-chip driver circuits |
US4855623A (en) * | 1987-11-05 | 1989-08-08 | Texas Instruments Incorporated | Output buffer having programmable drive current |
US4874967A (en) * | 1987-12-15 | 1989-10-17 | Xicor, Inc. | Low power voltage clamp circuit |
US4877978A (en) * | 1988-09-19 | 1989-10-31 | Cypress Semiconductor | Output buffer tri-state noise reduction circuit |
US4992678A (en) * | 1988-12-15 | 1991-02-12 | Ncr Corporation | High speed computer data transfer system |
US5004936A (en) * | 1989-03-31 | 1991-04-02 | Texas Instruments Incorporated | Non-loading output driver circuit |
-
1990
- 1990-11-05 US US07/608,788 patent/US5179299A/en not_active Expired - Lifetime
-
1991
- 1991-10-29 DE DE69124194T patent/DE69124194T2/de not_active Expired - Fee Related
- 1991-10-29 EP EP91309984A patent/EP0485102B1/de not_active Expired - Lifetime
- 1991-11-01 JP JP3313090A patent/JPH052558A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
US5179299A (en) | 1993-01-12 |
JPH052558A (ja) | 1993-01-08 |
DE69124194T2 (de) | 1997-09-04 |
EP0485102B1 (de) | 1997-01-15 |
EP0485102A2 (de) | 1992-05-13 |
EP0485102A3 (en) | 1992-06-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8328 | Change in the person/name/address of the agent |
Free format text: V. BEZOLD & SOZIEN, 80799 MUENCHEN |
|
8339 | Ceased/non-payment of the annual fee |