DE69121451T2 - Verfahren zum Herstellen einer Titansilizidschicht auf einer Halbleiterschicht - Google Patents

Verfahren zum Herstellen einer Titansilizidschicht auf einer Halbleiterschicht

Info

Publication number
DE69121451T2
DE69121451T2 DE1991621451 DE69121451T DE69121451T2 DE 69121451 T2 DE69121451 T2 DE 69121451T2 DE 1991621451 DE1991621451 DE 1991621451 DE 69121451 T DE69121451 T DE 69121451T DE 69121451 T2 DE69121451 T2 DE 69121451T2
Authority
DE
Germany
Prior art keywords
producing
titanium silicide
layer
semiconductor layer
silicide layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE1991621451
Other languages
English (en)
Other versions
DE69121451D1 (de
Inventor
Jaim Nulman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/510,340 external-priority patent/US5043300A/en
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Application granted granted Critical
Publication of DE69121451D1 publication Critical patent/DE69121451D1/de
Publication of DE69121451T2 publication Critical patent/DE69121451T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67167—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers surrounding a central transfer chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrodes Of Semiconductors (AREA)
DE1991621451 1990-04-16 1991-04-16 Verfahren zum Herstellen einer Titansilizidschicht auf einer Halbleiterschicht Expired - Fee Related DE69121451T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US51030790A 1990-04-16 1990-04-16
US50992890A 1990-04-16 1990-04-16
US07/510,340 US5043300A (en) 1990-04-16 1990-04-16 Single anneal step process for forming titanium silicide on semiconductor wafer

Publications (2)

Publication Number Publication Date
DE69121451D1 DE69121451D1 (de) 1996-09-26
DE69121451T2 true DE69121451T2 (de) 1997-02-20

Family

ID=27414429

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1991621451 Expired - Fee Related DE69121451T2 (de) 1990-04-16 1991-04-16 Verfahren zum Herstellen einer Titansilizidschicht auf einer Halbleiterschicht

Country Status (3)

Country Link
EP (3) EP0452889A3 (de)
DE (1) DE69121451T2 (de)
ES (1) ES2090165T3 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11869806B2 (en) 2021-05-07 2024-01-09 Applied Materials, Inc. Methods of forming molybdenum contacts
US11908914B2 (en) 2021-07-15 2024-02-20 Applied Materials, Inc. Methods of forming semiconductor structures

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR920006533A (ko) * 1990-09-28 1992-04-27 제임스 조셉 드롱 증착된 박막의 장벽성을 개선하기 위한 플라즈마 어닐링 방법
US5849634A (en) * 1994-04-15 1998-12-15 Sharp Kk Method of forming silicide film on silicon with oxygen concentration below 1018 /cm3
KR100449273B1 (ko) * 1997-08-26 2004-11-26 삼성전자주식회사 반도체 제조 장치 및 방법
KR20010051575A (ko) * 1999-11-09 2001-06-25 조셉 제이. 스위니 살리사이드 처리를 위한 화학적 플라즈마 세정
CN101452831B (zh) * 2007-11-30 2010-06-02 中芯国际集成电路制造(上海)有限公司 生产晶圆的第一片效应的控制方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1185964B (it) * 1985-10-01 1987-11-18 Sgs Microelettronica Spa Procedimento e relativa apparecchiatura per realizzare contatti metallo-semiconduttore di tipo ohmico
EP0272141B1 (de) * 1986-12-19 1994-03-02 Applied Materials, Inc. Integriertes Bearbeitungssystem mit Vielfachkammer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11869806B2 (en) 2021-05-07 2024-01-09 Applied Materials, Inc. Methods of forming molybdenum contacts
US11908914B2 (en) 2021-07-15 2024-02-20 Applied Materials, Inc. Methods of forming semiconductor structures

Also Published As

Publication number Publication date
EP0452889A2 (de) 1991-10-23
EP0452888A3 (en) 1992-01-22
ES2090165T3 (es) 1996-10-16
EP0452891A2 (de) 1991-10-23
DE69121451D1 (de) 1996-09-26
EP0452889A3 (en) 1992-01-22
EP0452888B1 (de) 1996-08-21
EP0452888A2 (de) 1991-10-23
EP0452891A3 (en) 1992-01-22

Similar Documents

Publication Publication Date Title
DE3779672T2 (de) Verfahren zum herstellen einer monokristallinen halbleiterschicht.
DE69126934D1 (de) Verfahren zum Herstellen einer Halbleiteranordnung mit Mehrlagen-Verbindungsleitungen
DE69430097D1 (de) Verfahren zum Kristallisieren einer Siliziumschicht
DE69131586D1 (de) Strahlungsemittierende Halbleiteranordnung und Verfahren zum Herstellen einer derartigen Halbleiteranordnung
DE3780369T2 (de) Verfahren zum herstellen einer halbleiterstruktur.
DE3483280D1 (de) Verfahren zum herstellen einer mehrschicht-halbleiteranordnung.
DE3584757D1 (de) Verfahren zum herstellen einer zwei-wannen-cmos-halbleiterstruktur.
DE69334194D1 (de) Verfahren zum Erzeugen einer Halbleitervorrichtung
DE69425854D1 (de) Verfahren zum Herstellen einer Substratstruktur mit verbesserter Wärmezerstreuung
DE69205000D1 (de) Verfahren zum herstellen einer zahnärztlichen absaugeinrichtung.
DE68906034D1 (de) Verfahren zum herstellen einer halbleiteranordnung.
DE69226887T2 (de) Halbleiteranordnung und Verfahren zum Herstellen einer derartigen Halbleiteranordnung
DE59805905D1 (de) Verfahren zum herstellen einer zahnstange
DE3877282T2 (de) Verfahren zum herstellen einer halbleiter-vorrichtung.
ATA194691A (de) Verfahren zum herstellen einer mehrschichtholzplatte
DE69615051D1 (de) Verfahren zum herstellen von einer fender schützenden struktur
DE69022710D1 (de) Verfahren zum Herstellen einer Halbleitervorrichtung.
DE3780936T2 (de) Verfahren zum herstellen einer halbleitervorrichtung.
DE69121451D1 (de) Verfahren zum Herstellen einer Titansilizidschicht auf einer Halbleiterschicht
DE3482526D1 (de) Verfahren zum herstellen einer halbleiteranordnung.
ATA122690A (de) Verfahren zum herstellen einer nockenwelle
DE3482432D1 (de) Verfahren zum herstellen einer halbleiteranordnung.
DE69033424D1 (de) Verfahren zum Herstellen einer Schutzsperre aus Silicidzonen
DE3886429D1 (de) Verfahren zum Herstellen einer supraleitenden Dünnschicht.
DE59104091D1 (de) Verfahren zum herstellen einer schaltung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee