DE69111203D1 - LDD Metalloxyd-Halbleiter-Feldeffekttransistor und Verfahren zur Herstellung. - Google Patents
LDD Metalloxyd-Halbleiter-Feldeffekttransistor und Verfahren zur Herstellung.Info
- Publication number
- DE69111203D1 DE69111203D1 DE69111203T DE69111203T DE69111203D1 DE 69111203 D1 DE69111203 D1 DE 69111203D1 DE 69111203 T DE69111203 T DE 69111203T DE 69111203 T DE69111203 T DE 69111203T DE 69111203 D1 DE69111203 D1 DE 69111203D1
- Authority
- DE
- Germany
- Prior art keywords
- ldd
- manufacturing
- metal oxide
- oxide semiconductor
- field effect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- -1 LDD metal oxide Chemical class 0.000 title 1
- 238000002353 field-effect transistor method Methods 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 229910044991 metal oxide Inorganic materials 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2339394A JPH04206933A (ja) | 1990-11-30 | 1990-11-30 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69111203D1 true DE69111203D1 (de) | 1995-08-17 |
DE69111203T2 DE69111203T2 (de) | 1996-04-04 |
Family
ID=18327060
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69111203T Expired - Fee Related DE69111203T2 (de) | 1990-11-30 | 1991-12-02 | LDD Metalloxyd-Halbleiter-Feldeffekttransistor und Verfahren zur Herstellung. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5292674A (de) |
EP (1) | EP0489559B1 (de) |
JP (1) | JPH04206933A (de) |
DE (1) | DE69111203T2 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5376566A (en) * | 1993-11-12 | 1994-12-27 | Micron Semiconductor, Inc. | N-channel field effect transistor having an oblique arsenic implant for lowered series resistance |
US5439835A (en) * | 1993-11-12 | 1995-08-08 | Micron Semiconductor, Inc. | Process for DRAM incorporating a high-energy, oblique P-type implant for both field isolation and punchthrough |
US5614432A (en) * | 1994-04-23 | 1997-03-25 | Nec Corporation | Method for manufacturing LDD type MIS device |
US5478763A (en) * | 1995-01-19 | 1995-12-26 | United Microelectronics Corporation | High performance field effect transistor and method of manufacture thereof |
US5935867A (en) * | 1995-06-07 | 1999-08-10 | Advanced Micro Devices, Inc. | Shallow drain extension formation by angled implantation |
US6180470B1 (en) * | 1996-12-19 | 2001-01-30 | Lsi Logic Corporation | FETs having lightly doped drain regions that are shaped with counter and noncounter dorant elements |
EP0966762A1 (de) * | 1997-01-21 | 1999-12-29 | Advanced Micro Devices, Inc. | HYBRIDER As/P-nLDD-ÜBERGANG UND MITTLERE Vdd-FUNKTIONSWEISE FÜR HOCHGESCHWINDIGKEITSMIKROPROZESSOREN |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60136376A (ja) * | 1983-12-26 | 1985-07-19 | Hitachi Ltd | 半導体装置の製造方法 |
EP0187016B1 (de) * | 1984-12-27 | 1991-02-20 | Kabushiki Kaisha Toshiba | MISFET mit niedrigdotiertem Drain und Verfahren zu seiner Herstellung |
JPS61216364A (ja) * | 1985-03-20 | 1986-09-26 | Fujitsu Ltd | 半導体装置 |
JPS62113474A (ja) * | 1985-11-13 | 1987-05-25 | Toshiba Corp | 半導体集積回路の製造方法 |
JPH0789587B2 (ja) * | 1985-12-27 | 1995-09-27 | 株式会社東芝 | 絶縁ゲート型電界効果トランジスタおよびその製造方法 |
US4771012A (en) * | 1986-06-13 | 1988-09-13 | Matsushita Electric Industrial Co., Ltd. | Method of making symmetrically controlled implanted regions using rotational angle of the substrate |
US4746624A (en) * | 1986-10-31 | 1988-05-24 | Hewlett-Packard Company | Method for making an LDD MOSFET with a shifted buried layer and a blocking region |
US4835740A (en) * | 1986-12-26 | 1989-05-30 | Kabushiki Kaisha Toshiba | Floating gate type semiconductor memory device |
US5061975A (en) * | 1988-02-19 | 1991-10-29 | Mitsubishi Denki Kabushiki Kaisha | MOS type field effect transistor having LDD structure |
JP2562688B2 (ja) * | 1989-05-12 | 1996-12-11 | 三洋電機株式会社 | 半導体装置の製造方法 |
US5158903A (en) * | 1989-11-01 | 1992-10-27 | Matsushita Electric Industrial Co., Ltd. | Method for producing a field-effect type semiconductor device |
US5023190A (en) * | 1990-08-03 | 1991-06-11 | Micron Technology, Inc. | CMOS processes |
US5091763A (en) * | 1990-12-19 | 1992-02-25 | Intel Corporation | Self-aligned overlap MOSFET and method of fabrication |
US5102815A (en) * | 1990-12-19 | 1992-04-07 | Intel Corporation | Method of fabricating a composite inverse T-gate metal oxide semiconductor device |
US5162884A (en) * | 1991-03-27 | 1992-11-10 | Sgs-Thomson Microelectronics, Inc. | Insulated gate field-effect transistor with gate-drain overlap and method of making the same |
-
1990
- 1990-11-30 JP JP2339394A patent/JPH04206933A/ja active Pending
-
1991
- 1991-11-29 US US07/800,170 patent/US5292674A/en not_active Expired - Fee Related
- 1991-12-02 EP EP91311183A patent/EP0489559B1/de not_active Expired - Lifetime
- 1991-12-02 DE DE69111203T patent/DE69111203T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH04206933A (ja) | 1992-07-28 |
DE69111203T2 (de) | 1996-04-04 |
EP0489559B1 (de) | 1995-07-12 |
US5292674A (en) | 1994-03-08 |
EP0489559A1 (de) | 1992-06-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |