DE69100960D1 - Leiterplatte. - Google Patents

Leiterplatte.

Info

Publication number
DE69100960D1
DE69100960D1 DE91104776T DE69100960T DE69100960D1 DE 69100960 D1 DE69100960 D1 DE 69100960D1 DE 91104776 T DE91104776 T DE 91104776T DE 69100960 T DE69100960 T DE 69100960T DE 69100960 D1 DE69100960 D1 DE 69100960D1
Authority
DE
Germany
Prior art keywords
circuit board
board
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE91104776T
Other languages
English (en)
Other versions
DE69100960T2 (de
Inventor
Megumu Takeuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Lighting and Technology Corp
Original Assignee
Toshiba Lighting and Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Lighting and Technology Corp filed Critical Toshiba Lighting and Technology Corp
Publication of DE69100960D1 publication Critical patent/DE69100960D1/de
Application granted granted Critical
Publication of DE69100960T2 publication Critical patent/DE69100960T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0391—Using different types of conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981—Metallised walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
DE91104776T 1990-03-30 1991-03-26 Leiterplatte. Expired - Fee Related DE69100960T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2083855A JPH03283594A (ja) 1990-03-30 1990-03-30 回路基板

Publications (2)

Publication Number Publication Date
DE69100960D1 true DE69100960D1 (de) 1994-02-24
DE69100960T2 DE69100960T2 (de) 1994-05-11

Family

ID=13814305

Family Applications (1)

Application Number Title Priority Date Filing Date
DE91104776T Expired - Fee Related DE69100960T2 (de) 1990-03-30 1991-03-26 Leiterplatte.

Country Status (4)

Country Link
US (1) US5200579A (de)
EP (1) EP0450470B1 (de)
JP (1) JPH03283594A (de)
DE (1) DE69100960T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH069167U (ja) * 1992-07-02 1994-02-04 日本航空電子工業株式会社 可撓性回路基板
JP3338527B2 (ja) * 1992-10-07 2002-10-28 富士通株式会社 高密度積層形のコネクタ、及び、コネクタの設計方法
US5397861A (en) * 1992-10-21 1995-03-14 Mupac Corporation Electrical interconnection board
FR2702920B1 (fr) * 1993-03-18 1995-05-12 Tekelec Airtronic Sa Dispositif électronique miniaturisé, notamment dispositif à effet gyromagnétique.
US5539156A (en) * 1994-11-16 1996-07-23 International Business Machines Corporation Non-annular lands
DE19618099A1 (de) * 1996-05-06 1997-11-13 Siemens Ag Leiterverbundsystem und Verfahren zur Herstellung elektrisch leitender Verbindungen zwischen zwei oder mehr Leiterstrukturen
US6112406A (en) * 1996-05-06 2000-09-05 Siemens Aktiengesellschaft Method for producing electrically conductive connections between two or more conductor structures
US6479763B1 (en) * 1998-08-28 2002-11-12 Matsushita Electric Industrial Co., Ltd. Conductive paste, conductive structure using the same, electronic part, module, circuit board, method for electrical connection, method for manufacturing circuit board, and method for manufacturing ceramic electronic part
US7088002B2 (en) * 2000-12-18 2006-08-08 Intel Corporation Interconnect
JP2003023250A (ja) * 2001-07-06 2003-01-24 Denso Corp 多層基板のおよびその製造方法
TW540281B (en) * 2001-08-09 2003-07-01 Matsushita Electric Ind Co Ltd Manufacturing method of conductive paste material and manufacturing method of printing wiring base board
JP4192554B2 (ja) * 2002-10-25 2008-12-10 株式会社デンソー 多層回路基板の製造方法
JP4473935B1 (ja) * 2009-07-06 2010-06-02 新光電気工業株式会社 多層配線基板
TWI578866B (zh) * 2013-06-19 2017-04-11 Adv Flexible Circuits Co Ltd Conductive circuit layer conductive structure of flexible circuit board

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4511757A (en) * 1983-07-13 1985-04-16 At&T Technologies, Inc. Circuit board fabrication leading to increased capacity
JPS60137092A (ja) * 1983-12-19 1985-07-20 株式会社東芝 回路基板の製造方法
EP0247575B1 (de) * 1986-05-30 1993-07-21 Furukawa Denki Kogyo Kabushiki Kaisha Mehrschichtige gedruckte Schaltung und Verfahren zu ihrer Herstellung
JPH01319990A (ja) * 1988-06-22 1989-12-26 Sumitomo Electric Ind Ltd 厚膜形成方法
US5045141A (en) * 1988-07-01 1991-09-03 Amoco Corporation Method of making solderable printed circuits formed without plating

Also Published As

Publication number Publication date
EP0450470B1 (de) 1994-01-12
EP0450470A2 (de) 1991-10-09
DE69100960T2 (de) 1994-05-11
US5200579A (en) 1993-04-06
JPH03283594A (ja) 1991-12-13
EP0450470A3 (en) 1992-04-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee