DE69027581T2 - Verkapselte elektronische schaltung mit chip auf einer quadrierten zone mit leiterpodesten - Google Patents
Verkapselte elektronische schaltung mit chip auf einer quadrierten zone mit leiterpodestenInfo
- Publication number
- DE69027581T2 DE69027581T2 DE69027581T DE69027581T DE69027581T2 DE 69027581 T2 DE69027581 T2 DE 69027581T2 DE 69027581 T DE69027581 T DE 69027581T DE 69027581 T DE69027581 T DE 69027581T DE 69027581 T2 DE69027581 T2 DE 69027581T2
- Authority
- DE
- Germany
- Prior art keywords
- podes
- ladder
- chip
- electronic circuit
- enclosed electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/48233—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a potential ring of the item
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8907091A FR2647962B1 (fr) | 1989-05-30 | 1989-05-30 | Circuit electronique en boitier avec puce sur zone quadrillee de plots conducteurs |
PCT/FR1990/000360 WO1990015439A1 (fr) | 1989-05-30 | 1990-05-22 | Circuit electronique en boitier avec puce sur zone quadrillee de plots conducteurs |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69027581D1 DE69027581D1 (de) | 1996-08-01 |
DE69027581T2 true DE69027581T2 (de) | 1996-11-21 |
Family
ID=9382163
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69027581T Expired - Fee Related DE69027581T2 (de) | 1989-05-30 | 1990-05-22 | Verkapselte elektronische schaltung mit chip auf einer quadrierten zone mit leiterpodesten |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0431106B1 (de) |
DE (1) | DE69027581T2 (de) |
FR (1) | FR2647962B1 (de) |
WO (1) | WO1990015439A1 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0518701A3 (en) * | 1991-06-14 | 1993-04-21 | Aptix Corporation | Field programmable circuit module |
KR100276165B1 (ko) * | 1995-01-24 | 2000-12-15 | 피터 엔. 데트킨 | 고성능집적회로패키지 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58122753A (ja) * | 1982-01-14 | 1983-07-21 | Nec Corp | 高密度チツプキヤリア |
US4495377A (en) * | 1982-12-30 | 1985-01-22 | International Business Machines Corporation | Substrate wiring patterns for connecting to integrated-circuit chips |
JPS60138931A (ja) * | 1983-12-27 | 1985-07-23 | Mitsubishi Electric Corp | 半導体集積回路装置 |
CA1315019C (en) * | 1987-10-23 | 1993-03-23 | Honeywell Inc. | Universal semiconductor chip package |
-
1989
- 1989-05-30 FR FR8907091A patent/FR2647962B1/fr not_active Expired - Fee Related
-
1990
- 1990-05-22 DE DE69027581T patent/DE69027581T2/de not_active Expired - Fee Related
- 1990-05-22 WO PCT/FR1990/000360 patent/WO1990015439A1/fr active IP Right Grant
- 1990-05-22 EP EP90908551A patent/EP0431106B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2647962B1 (fr) | 1994-04-15 |
FR2647962A1 (fr) | 1990-12-07 |
EP0431106B1 (de) | 1996-06-26 |
WO1990015439A1 (fr) | 1990-12-13 |
EP0431106A1 (de) | 1991-06-12 |
DE69027581D1 (de) | 1996-08-01 |
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