DE69020569D1 - Modulares ein-/ausgabesystem für superrechner. - Google Patents

Modulares ein-/ausgabesystem für superrechner.

Info

Publication number
DE69020569D1
DE69020569D1 DE69020569T DE69020569T DE69020569D1 DE 69020569 D1 DE69020569 D1 DE 69020569D1 DE 69020569 T DE69020569 T DE 69020569T DE 69020569 T DE69020569 T DE 69020569T DE 69020569 D1 DE69020569 D1 DE 69020569D1
Authority
DE
Germany
Prior art keywords
modular input
output system
super computers
buffer
modular
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69020569T
Other languages
English (en)
Other versions
DE69020569T2 (de
Inventor
Robert Halford
Calvin Coleman
Georges Hopkins
Peter Logghe
Eric Lundberg
Gerald Schwoerer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cray Research LLC
Original Assignee
Cray Research LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cray Research LLC filed Critical Cray Research LLC
Application granted granted Critical
Publication of DE69020569D1 publication Critical patent/DE69020569D1/de
Publication of DE69020569T2 publication Critical patent/DE69020569T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Human Computer Interaction (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Control By Computers (AREA)
  • Massaging Devices (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
  • Bus Control (AREA)
DE69020569T 1989-08-08 1990-07-31 Modulares ein-/ausgabesystem für superrechner. Expired - Fee Related DE69020569T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/390,722 US5347637A (en) 1989-08-08 1989-08-08 Modular input/output system for supercomputers
PCT/US1990/004279 WO1991002312A1 (en) 1989-08-08 1990-07-31 Modular input/output system for supercomputers

Publications (2)

Publication Number Publication Date
DE69020569D1 true DE69020569D1 (de) 1995-08-03
DE69020569T2 DE69020569T2 (de) 1995-11-30

Family

ID=23543656

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69020569T Expired - Fee Related DE69020569T2 (de) 1989-08-08 1990-07-31 Modulares ein-/ausgabesystem für superrechner.

Country Status (6)

Country Link
US (1) US5347637A (de)
EP (1) EP0485507B1 (de)
AT (1) ATE124553T1 (de)
CA (1) CA2064746A1 (de)
DE (1) DE69020569T2 (de)
WO (1) WO1991002312A1 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993023813A1 (de) * 1992-05-14 1993-11-25 Siemens Nixdorf Informationssysteme Aktiengesellschaft Datenverarbeitungsanlage mit einer anwendungsspezifischen ausstattung
JPH0675785A (ja) * 1992-06-29 1994-03-18 Fujitsu Ltd プレステージング処理方法、バッファ管理方法及びファイルシステム
US5539915A (en) * 1992-09-17 1996-07-23 International Business Machines Corporation System for completely transferring data from disk having low rate to buffer and transferring data from buffer to computer through channel having higher rate concurrently
US5625845A (en) * 1992-10-13 1997-04-29 International Business Machines Corporation System for facilitating continuous, real-time, unidirectional, and asynchronous intertask and end-device communication in a multimedia data processing system using open architecture data communication modules
US5611053A (en) * 1994-01-21 1997-03-11 Advanced Micro Devices, Inc. Apparatus and method for integrating bus master ownership of local bus load by plural data transceivers
US5577213A (en) * 1994-06-03 1996-11-19 At&T Global Information Solutions Company Multi-device adapter card for computer
EP0685803B1 (de) 1994-06-03 2001-04-18 Hyundai Electronics America Herstellungsverfahren für einen elektrischen Vorrichtungs-Adapter
JP3299853B2 (ja) * 1995-01-31 2002-07-08 株式会社ソニー・コンピュータエンタテインメント 通信システムおよび通信用中継器
US6044430A (en) * 1997-12-17 2000-03-28 Advanced Micro Devices Inc. Real time interrupt handling for superscalar processors
GB9802097D0 (en) * 1998-01-30 1998-03-25 Sgs Thomson Microelectronics DMA controller
DE19850650C2 (de) * 1998-11-03 2000-09-07 Texas Instruments Deutschland Verfahren zum Übertragen von Daten
CA2364188A1 (en) * 2000-11-29 2002-05-29 Reynolds And Reynolds Holdings, Inc. Improved loyalty link method and apparatus for integrating customer information with dealer management information
EP1547252A4 (de) * 2002-07-29 2011-04-20 Robert Halford Mehrdimensionales datenschutz- und -spiegelungsverfahren für mikroebenendaten
US7801033B2 (en) * 2005-07-26 2010-09-21 Nethra Imaging, Inc. System of virtual data channels in an integrated circuit
US20080059686A1 (en) * 2006-08-31 2008-03-06 Keith Iain Wilkinson Multiple context single logic virtual host channel adapter supporting multiple transport protocols
US7870306B2 (en) 2006-08-31 2011-01-11 Cisco Technology, Inc. Shared memory message switch and cache
US8082381B2 (en) * 2008-09-02 2011-12-20 Nvidia Corporation Connecting a plurality of peripherals
US8103803B2 (en) * 2008-11-21 2012-01-24 Nvidia Corporation Communication between a processor and a controller
US8610732B2 (en) * 2008-12-11 2013-12-17 Nvidia Corporation System and method for video memory usage for general system application
US8677074B2 (en) * 2008-12-15 2014-03-18 Nvidia Corporation Shared memory access techniques
CN102609217B (zh) * 2012-01-13 2015-04-29 从兴技术有限公司 一种io设备的高速存储方法及系统
CN104657287A (zh) * 2015-02-12 2015-05-27 成都大公博创信息技术有限公司 一种适用于宽带接收机的新型数据缓存系统及其缓存方法
KR102569177B1 (ko) * 2018-11-29 2023-08-23 에스케이하이닉스 주식회사 컨트롤러, 이를 포함하는 메모리 시스템 및 메모리 시스템의 동작 방법
US10834006B2 (en) 2019-01-24 2020-11-10 Mellanox Technologies, Ltd. Network traffic disruptions
US10999366B2 (en) 2019-03-10 2021-05-04 Mellanox Technologies Tlv Ltd. Mirroring dropped packets

Family Cites Families (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1191560A (en) * 1968-10-04 1970-05-13 Burroughs Corp Input/Output Control for a Digital Computing System.
US3688274A (en) * 1970-12-23 1972-08-29 Ibm Command retry control by peripheral devices
GB1323048A (en) * 1971-03-03 1973-07-11 Ibm Communications control unit
US3725864A (en) * 1971-03-03 1973-04-03 Ibm Input/output control
US3836891A (en) * 1973-07-05 1974-09-17 Bendix Corp Tape reader system with buffer memory
US3976977A (en) * 1975-03-26 1976-08-24 Honeywell Information Systems, Inc. Processor for input-output processing system
US4006466A (en) * 1975-03-26 1977-02-01 Honeywell Information Systems, Inc. Programmable interface apparatus and method
US4000487A (en) * 1975-03-26 1976-12-28 Honeywell Information Systems, Inc. Steering code generating apparatus for use in an input/output processing system
JPS5247635A (en) * 1975-10-15 1977-04-15 Toshiba Corp Control method for transmitting informat ion
US4038642A (en) * 1976-04-30 1977-07-26 International Business Machines Corporation Input/output interface logic for concurrent operations
US4313160A (en) * 1976-08-17 1982-01-26 Computer Automation, Inc. Distributed input/output controller system
US4228496A (en) * 1976-09-07 1980-10-14 Tandem Computers Incorporated Multiprocessor system
GB1574469A (en) * 1976-09-30 1980-09-10 Borroughs Corp Interface system providing interfaces to central processing unit and modular processor-controllers for an input-out-put subsystem
US4074352A (en) * 1976-09-30 1978-02-14 Burroughs Corporation Modular block unit for input-output subsystem
US4162520A (en) * 1976-09-30 1979-07-24 Burroughs Corporation Intelligent input-output interface control unit for input-output subsystem
US4403282A (en) * 1978-01-23 1983-09-06 Data General Corporation Data processing system using a high speed data channel for providing direct memory access for block data transfers
US4276594A (en) * 1978-01-27 1981-06-30 Gould Inc. Modicon Division Digital computer with multi-processor capability utilizing intelligent composite memory and input/output modules and method for performing the same
US4258418A (en) * 1978-12-28 1981-03-24 International Business Machines Corporation Variable capacity data buffer system
US4309755A (en) * 1979-08-22 1982-01-05 Bell Telephone Laboratories, Incorporated Computer input/output arrangement for enabling a simultaneous read/write data transfer
US4455661A (en) * 1980-04-03 1984-06-19 Codex Corporation Dual processor digital modem apparatus
US4385382A (en) * 1980-09-29 1983-05-24 Honeywell Information Systems Inc. Communication multiplexer having a variable priority scheme using a read only memory
US4454575A (en) * 1980-12-29 1984-06-12 International Business Machines Corporation Shared memory system with access by specialized peripherals managed by controller initialized by supervisory CPU
US4458316A (en) * 1981-03-06 1984-07-03 International Business Machines Corporation Queuing commands in a peripheral data storage system
US4543627A (en) * 1981-12-14 1985-09-24 At&T Bell Laboratories Internal communication arrangement for a multiprocessor system
US4571674A (en) * 1982-09-27 1986-02-18 International Business Machines Corporation Peripheral storage system having multiple data transfer rates
US4628446A (en) * 1982-12-06 1986-12-09 At&T Bell Laboratories Multichannel interface
US4542457A (en) * 1983-01-11 1985-09-17 Burroughs Corporation Burst mode data block transfer system
US4607346A (en) * 1983-03-28 1986-08-19 International Business Machines Corporation Apparatus and method for placing data on a partitioned direct access storage device
US4901230A (en) * 1983-04-25 1990-02-13 Cray Research, Inc. Computer vector multiprocessing control with multiple access memory and priority conflict resolution method
US4939644A (en) * 1983-05-19 1990-07-03 Data General Corporation Input/output controller for controlling the sequencing of the execution of input/output commands in a data processing system
US4602331A (en) * 1983-06-30 1986-07-22 Burroughs Corporation Magnetic tape-data link processor providing automatic data transfer
FR2561428B1 (fr) * 1984-03-16 1986-09-12 Bull Sa Procede d'enregistrement dans une memoire a disques et systeme de memoire a disques
CA1228677A (en) * 1984-06-21 1987-10-27 Cray Research, Inc. Peripheral interface system
JPS62138948A (ja) * 1985-12-13 1987-06-22 Hitachi Ltd デ−タ転送装置
EP0228559A1 (de) * 1985-12-17 1987-07-15 BBC Brown Boveri AG Fehlertolerante Mehrrechneranordnung
US4852045A (en) * 1986-05-06 1989-07-25 Hayes Microcomputer Products, Inc. Message buffer with improved escape sequence and automatic document marking
US4860193A (en) * 1986-05-22 1989-08-22 International Business Machines Corporation System for efficiently transferring data between a high speed channel and a low speed I/O device
US5062043A (en) * 1986-12-16 1991-10-29 The Tokyo Electric Power Co., Inc. Information collecting and distributing system providing plural sources and destinations with synchronous alternating access to common storage
US4821170A (en) * 1987-04-17 1989-04-11 Tandem Computers Incorporated Input/output system for multiprocessors
US4870643A (en) * 1987-11-06 1989-09-26 Micropolis Corporation Parallel drive array storage system
US4878173A (en) * 1988-05-16 1989-10-31 Data General Corporation Controller burst multiplexor channel interface
JPH029063A (ja) * 1988-06-28 1990-01-12 Nec Corp ディスク制御装置
US5065314A (en) * 1988-09-23 1991-11-12 Allen-Bradley Company, Inc. Method and circuit for automatically communicating in two modes through a backplane
US5072420A (en) * 1989-03-16 1991-12-10 Western Digital Corporation FIFO control architecture and method for buffer memory access arbitration

Also Published As

Publication number Publication date
ATE124553T1 (de) 1995-07-15
EP0485507B1 (de) 1995-06-28
CA2064746A1 (en) 1991-02-09
EP0485507A1 (de) 1992-05-20
US5347637A (en) 1994-09-13
DE69020569T2 (de) 1995-11-30
WO1991002312A1 (en) 1991-02-21

Similar Documents

Publication Publication Date Title
DE69020569D1 (de) Modulares ein-/ausgabesystem für superrechner.
ES458224A1 (es) Una unidad de control de dispositivo periferico con circui- tos logicos mejorados de acoplamiento de entrada-salida parauso en un sistema de tratamiento de datos.
SE8405456L (sv) Mycket snabbt minnes- och minnesforvaltningssystem
EP0262468A3 (de) Veränderbarer Fifo-Speicher
EP0380855A3 (de) Speicherkonfiguration zur Verwendung für Schnittstellenbildung zwischen einer Systemsteuereinheit für ein Multiprozessorsystem und dem Hauptspeicher
ATE125629T1 (de) Busschnittstellenschaltung für digitalen datenprozessor.
EP0059794A3 (de) Datenverarbeitungsanlage
CN211427336U (zh) 一种嵌入式vpx计算模块
EP0231595A3 (de) Ein/Ausgabe-Steuervorrichtung für ein Datenverarbeitungssystem
EP0388300A3 (de) Steuerung für direkten Speicherzugriff
EP0382358A3 (de) Direktspeicherzugriffssteuerung mit Volladressen-Adressierung und mit Übertragung von Wörtern mit ungeraden Adressen
ATE108034T1 (de) Druckereisteuerungssystem.
MY114652A (en) Personal computer with local bus arbitration.
EP0373790A3 (de) Rettungs- und Rückspeicherungsdatenprozessoranordnung
EP0164972A3 (de) Mehrprozessorsystem mit gemeinschaftlichem Speicher
EP0201088A3 (de) Parallelrechner
ES2119893T3 (es) Interfaz paralela para la conexion de aparatos de procesamiento de datos.
ATE332531T1 (de) Geteilter rechner
KR950004022A (ko) 분산처리통합 관리시스템
EP0282969A3 (de) Computersystem mit einer Vorrichtung um die Reihenfolge des Bytes zu wechseln
JPS5338236A (en) Multi-computer system
JPS5587220A (en) Interface controller
EP0382342A3 (de) DMA-Übertragung für Rechnersystem
EP0568678B1 (de) Datenübertragungsvorrichtung
KR0171769B1 (ko) 고속 중형컴퓨터에 있어서 isdn보드의 데이터 전달방법

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee