ATE332531T1 - Geteilter rechner - Google Patents

Geteilter rechner

Info

Publication number
ATE332531T1
ATE332531T1 AT99957481T AT99957481T ATE332531T1 AT E332531 T1 ATE332531 T1 AT E332531T1 AT 99957481 T AT99957481 T AT 99957481T AT 99957481 T AT99957481 T AT 99957481T AT E332531 T1 ATE332531 T1 AT E332531T1
Authority
AT
Austria
Prior art keywords
input
module
output
interface
external
Prior art date
Application number
AT99957481T
Other languages
English (en)
Inventor
Remigius G Shatas
Robert R Asprey
Christopher L Thomas
Greg O'bryant
Greg Luterman
Jeffrey E Choun
Original Assignee
Avocent Huntsville Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Avocent Huntsville Corp filed Critical Avocent Huntsville Corp
Application granted granted Critical
Publication of ATE332531T1 publication Critical patent/ATE332531T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4045—Coupling between buses using bus bridges where the bus bridge performs an extender function
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/10—Protocols in which an application is distributed across nodes in the network
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
    • H04L69/324—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the data link layer [OSI layer 2], e.g. HDLC
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
    • H04L69/329—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the application layer [OSI layer 7]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Saccharide Compounds (AREA)
  • Bus Control (AREA)
  • Small-Scale Networks (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Computer And Data Communications (AREA)
  • Debugging And Monitoring (AREA)
AT99957481T 1998-10-30 1999-10-29 Geteilter rechner ATE332531T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10625598P 1998-10-30 1998-10-30

Publications (1)

Publication Number Publication Date
ATE332531T1 true ATE332531T1 (de) 2006-07-15

Family

ID=22310393

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99957481T ATE332531T1 (de) 1998-10-30 1999-10-29 Geteilter rechner

Country Status (7)

Country Link
EP (2) EP1125210B1 (de)
AT (1) ATE332531T1 (de)
AU (2) AU1708800A (de)
DE (1) DE69932252T2 (de)
ES (1) ES2267303T3 (de)
HK (2) HK1041530B (de)
WO (2) WO2000026797A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002008886A2 (en) * 2000-07-20 2002-01-31 Celoxica Limited System, method and article of manufacture for controlling the use of resources
US20030041129A1 (en) * 2000-07-20 2003-02-27 John Applcby-Allis Voice-over-internet protocol telephone in reconfigurable logic
CN102929756A (zh) * 2012-10-28 2013-02-13 中国电子科技集团公司第十研究所 通用型高速并、串行总线开发验证平台

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4384327A (en) * 1978-10-31 1983-05-17 Honeywell Information Systems Inc. Intersystem cycle control logic
ZA883232B (en) * 1987-05-06 1989-07-26 Dowd Research Pty Ltd O Packet switches,switching methods,protocols and networks
US4959833A (en) * 1989-03-08 1990-09-25 Ics Electronics Corporation Data transmission method and bus extender
JPH034351A (ja) * 1989-04-26 1991-01-10 Dubner Computer Syst Inc システム・バス・データ・リンク装置
US5430848A (en) * 1992-08-14 1995-07-04 Loral Fairchild Corporation Distributed arbitration with programmable priorities
US5812534A (en) * 1993-01-08 1998-09-22 Multi-Tech Systems, Inc. Voice over data conferencing for a computer-based personal communications system
US5664223A (en) * 1994-04-05 1997-09-02 International Business Machines Corporation System for independently transferring data using two independently controlled DMA engines coupled between a FIFO buffer and two separate buses respectively
US5659707A (en) * 1994-10-07 1997-08-19 Industrial Technology Research Institute Transfer labeling mechanism for multiple outstanding read requests on a split transaction bus
US5799207A (en) * 1995-03-28 1998-08-25 Industrial Technology Research Institute Non-blocking peripheral access architecture having a register configure to indicate a path selection for data transfer between a master, memory, and an I/O device
US5586121A (en) * 1995-04-21 1996-12-17 Hybrid Networks, Inc. Asymmetric hybrid access system and method
JP3873089B2 (ja) * 1995-06-07 2007-01-24 三星電子株式会社 互いに非同期の２つのバス間でデータ転送を同期する際の累積時間遅延を低減するもの
US5781747A (en) * 1995-11-14 1998-07-14 Mesa Ridge Technologies, Inc. Method and apparatus for extending the signal path of a peripheral component interconnect bus to a remote location
US5764479A (en) * 1996-09-23 1998-06-09 International Business Machines Corporation Split system personal computer having floppy disk drive moveable between accessible and inaccessible positions
EP0844567A1 (de) * 1996-11-21 1998-05-27 Hewlett-Packard Company PCI-Busbrücke für Fernübertragung

Also Published As

Publication number Publication date
DE69932252D1 (de) 2006-08-17
HK1043409A1 (zh) 2002-09-13
DE69932252T2 (de) 2007-06-06
EP1125210A4 (de) 2002-08-07
EP1133732A4 (de) 2003-01-22
WO2000026796A1 (en) 2000-05-11
ES2267303T3 (es) 2007-03-01
EP1133732A1 (de) 2001-09-19
EP1125210B1 (de) 2006-07-05
WO2000026797A1 (en) 2000-05-11
AU1708800A (en) 2000-05-22
HK1041530A1 (en) 2002-07-12
AU1517800A (en) 2000-05-22
HK1041530B (zh) 2007-01-19
EP1125210A1 (de) 2001-08-22
WO2000026797A9 (en) 2000-10-19
WO2000026796A9 (en) 2000-11-30

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties