DE68928145T2 - TTL-ECL-Pegelumsetzungsschaltung - Google Patents

TTL-ECL-Pegelumsetzungsschaltung

Info

Publication number
DE68928145T2
DE68928145T2 DE68928145T DE68928145T DE68928145T2 DE 68928145 T2 DE68928145 T2 DE 68928145T2 DE 68928145 T DE68928145 T DE 68928145T DE 68928145 T DE68928145 T DE 68928145T DE 68928145 T2 DE68928145 T2 DE 68928145T2
Authority
DE
Germany
Prior art keywords
ttl
conversion circuit
level conversion
ecl level
ecl
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68928145T
Other languages
English (en)
Other versions
DE68928145D1 (de
Inventor
Kouji C O Nec Corpor Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE68928145D1 publication Critical patent/DE68928145D1/de
Publication of DE68928145T2 publication Critical patent/DE68928145T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00353—Modifications for eliminating interference or parasitic voltages or currents in bipolar transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00376—Modifications for compensating variations of temperature, supply voltage or other physical parameters in bipolar transistor circuits
DE68928145T 1988-10-06 1989-10-06 TTL-ECL-Pegelumsetzungsschaltung Expired - Fee Related DE68928145T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63252682A JPH0716154B2 (ja) 1988-10-06 1988-10-06 Ｔｔｌ−ｅｃｌレベル変換回路

Publications (2)

Publication Number Publication Date
DE68928145D1 DE68928145D1 (de) 1997-08-07
DE68928145T2 true DE68928145T2 (de) 1998-02-19

Family

ID=17240776

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68928145T Expired - Fee Related DE68928145T2 (de) 1988-10-06 1989-10-06 TTL-ECL-Pegelumsetzungsschaltung

Country Status (4)

Country Link
US (1) US5036225A (de)
EP (1) EP0366294B1 (de)
JP (1) JPH0716154B2 (de)
DE (1) DE68928145T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03222516A (ja) * 1990-01-29 1991-10-01 Fujitsu Ltd 半導体装置
JPH06188718A (ja) * 1992-12-15 1994-07-08 Mitsubishi Electric Corp 半導体集積回路装置
US5920729A (en) * 1996-04-30 1999-07-06 Vtc Inc. Apparatus for providing pair of complementary outputs with first and subcircuits to convert non-complementary and complementary inputs to first and second pair of complementary output
CN104821818A (zh) * 2015-05-27 2015-08-05 沈震强 提高光耦输出速度的方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3006176C2 (de) * 1980-02-19 1981-12-03 Siemens AG, 1000 Berlin und 8000 München Einrichtung zur Signalpegelverschiebung
FR2534752A1 (fr) * 1982-10-18 1984-04-20 Radiotechnique Compelec Circuit convertisseur de niveaux de signaux entre une logique de type saturee et une logique de type non saturee
US4654549A (en) * 1985-06-04 1987-03-31 Fairchild Semiconductor Corporation Transistor-transistor logic to emitter coupled logic translator
JPH0763139B2 (ja) * 1985-10-31 1995-07-05 日本電気株式会社 レベル変換回路
US4771191A (en) * 1987-02-03 1988-09-13 Julio Estrada TTL to ECL translator
JPS63302621A (ja) * 1987-06-02 1988-12-09 Fujitsu Ltd 半導体集積回路
US4825108A (en) * 1987-06-15 1989-04-25 North American Philips Corporation, Signetics Division Voltage translator with restricted output voltage swing

Also Published As

Publication number Publication date
EP0366294A2 (de) 1990-05-02
JPH0716154B2 (ja) 1995-02-22
EP0366294A3 (de) 1990-12-05
EP0366294B1 (de) 1997-07-02
US5036225A (en) 1991-07-30
JPH02100418A (ja) 1990-04-12
DE68928145D1 (de) 1997-08-07

Similar Documents

Publication Publication Date Title
DK590187A (da) Trykt-kredsloebsantenne
KR850004689A (ko) 레벨 변환회로
DK638687D0 (da) Baereboelgereproducerende kredsloeb
KR900011154A (ko) 논리레벨 변환회로
DE3787181T2 (de) Pegelumwandlungsschaltung.
DE69126697T2 (de) Pegelumsetzschaltung
DE68926518D1 (de) Flipflop-Schaltung
KR870009546A (ko) 지연회로
DE69310162T2 (de) Pegelumsetzungsschaltung
DE68900955D1 (de) Spannungspegelverwandlungsschaltung.
AT388050B (de) Wasserwaage
DE3881948T2 (de) Massstabgerechte Spannungspegelumsetzungsschaltung.
DE68928145D1 (de) TTL-ECL-Pegelumsetzungsschaltung
KR890015096U (ko) 레벨 변환 회로
KR900013830U (ko) 음성중간 주파수 변환회로
KR900009302U (ko) 흑레벨 고정회로
ATA154388A (de) Integrierte schaltungsanordnung
KR890014887U (ko) 리세트회로
KR890016625U (ko) 신호변환 회로
KR900013684U (ko) Ohva회로
KR880008915U (ko) 귀선소거회로
KR890018308U (ko) 스타팅 회로
KR890024011U (ko) 모우드 변환시 과도 현상 방지회로
KR870017470U (ko) 신호 변환회로
KR900001816U (ko) 디지탈-아날로그 변환회로

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee