DE68928145D1 - TTL-ECL-Pegelumsetzungsschaltung - Google Patents
TTL-ECL-PegelumsetzungsschaltungInfo
- Publication number
- DE68928145D1 DE68928145D1 DE68928145T DE68928145T DE68928145D1 DE 68928145 D1 DE68928145 D1 DE 68928145D1 DE 68928145 T DE68928145 T DE 68928145T DE 68928145 T DE68928145 T DE 68928145T DE 68928145 D1 DE68928145 D1 DE 68928145D1
- Authority
- DE
- Germany
- Prior art keywords
- ttl
- conversion circuit
- level conversion
- ecl level
- ecl
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
- H03K19/01806—Interface arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
- H03K19/00353—Modifications for eliminating interference or parasitic voltages or currents in bipolar transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
- H03K19/00376—Modifications for compensating variations of temperature, supply voltage or other physical parameters in bipolar transistor circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63252682A JPH0716154B2 (ja) | 1988-10-06 | 1988-10-06 | Ttl−eclレベル変換回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68928145D1 true DE68928145D1 (de) | 1997-08-07 |
DE68928145T2 DE68928145T2 (de) | 1998-02-19 |
Family
ID=17240776
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68928145T Expired - Fee Related DE68928145T2 (de) | 1988-10-06 | 1989-10-06 | TTL-ECL-Pegelumsetzungsschaltung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5036225A (de) |
EP (1) | EP0366294B1 (de) |
JP (1) | JPH0716154B2 (de) |
DE (1) | DE68928145T2 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03222516A (ja) * | 1990-01-29 | 1991-10-01 | Fujitsu Ltd | 半導体装置 |
JPH06188718A (ja) * | 1992-12-15 | 1994-07-08 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US5920729A (en) * | 1996-04-30 | 1999-07-06 | Vtc Inc. | Apparatus for providing pair of complementary outputs with first and subcircuits to convert non-complementary and complementary inputs to first and second pair of complementary output |
CN104821818A (zh) * | 2015-05-27 | 2015-08-05 | 沈震强 | 提高光耦输出速度的方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3006176C2 (de) * | 1980-02-19 | 1981-12-03 | Siemens AG, 1000 Berlin und 8000 München | Einrichtung zur Signalpegelverschiebung |
FR2534752A1 (fr) * | 1982-10-18 | 1984-04-20 | Radiotechnique Compelec | Circuit convertisseur de niveaux de signaux entre une logique de type saturee et une logique de type non saturee |
US4654549A (en) * | 1985-06-04 | 1987-03-31 | Fairchild Semiconductor Corporation | Transistor-transistor logic to emitter coupled logic translator |
JPH0763139B2 (ja) * | 1985-10-31 | 1995-07-05 | 日本電気株式会社 | レベル変換回路 |
US4771191A (en) * | 1987-02-03 | 1988-09-13 | Julio Estrada | TTL to ECL translator |
JPS63302621A (ja) * | 1987-06-02 | 1988-12-09 | Fujitsu Ltd | 半導体集積回路 |
US4825108A (en) * | 1987-06-15 | 1989-04-25 | North American Philips Corporation, Signetics Division | Voltage translator with restricted output voltage swing |
-
1988
- 1988-10-06 JP JP63252682A patent/JPH0716154B2/ja not_active Expired - Lifetime
-
1989
- 1989-10-06 DE DE68928145T patent/DE68928145T2/de not_active Expired - Fee Related
- 1989-10-06 US US07/417,973 patent/US5036225A/en not_active Expired - Fee Related
- 1989-10-06 EP EP89310266A patent/EP0366294B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0366294A3 (de) | 1990-12-05 |
DE68928145T2 (de) | 1998-02-19 |
EP0366294A2 (de) | 1990-05-02 |
JPH0716154B2 (ja) | 1995-02-22 |
US5036225A (en) | 1991-07-30 |
EP0366294B1 (de) | 1997-07-02 |
JPH02100418A (ja) | 1990-04-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |