DE68925879D1 - Thermisches Oxydierungsverfahren mit verändertem Wachstum für dünne Oxide - Google Patents
Thermisches Oxydierungsverfahren mit verändertem Wachstum für dünne OxideInfo
- Publication number
- DE68925879D1 DE68925879D1 DE68925879T DE68925879T DE68925879D1 DE 68925879 D1 DE68925879 D1 DE 68925879D1 DE 68925879 T DE68925879 T DE 68925879T DE 68925879 T DE68925879 T DE 68925879T DE 68925879 D1 DE68925879 D1 DE 68925879D1
- Authority
- DE
- Germany
- Prior art keywords
- thermal oxidation
- oxidation process
- modified growth
- thin oxides
- oxides
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title 1
- 230000003647 oxidation Effects 0.000 title 1
- 238000007254 oxidation reaction Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02301—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment in-situ cleaning
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/118—Oxide films
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/974—Substrate surface preparation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Silicon Compounds (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US28797688A | 1988-12-21 | 1988-12-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68925879D1 true DE68925879D1 (de) | 1996-04-11 |
DE68925879T2 DE68925879T2 (de) | 1996-10-02 |
Family
ID=23105207
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68925879T Expired - Fee Related DE68925879T2 (de) | 1988-12-21 | 1989-12-11 | Thermisches Oxydierungsverfahren mit verändertem Wachstum für dünne Oxide |
Country Status (6)
Country | Link |
---|---|
US (1) | US5132244A (de) |
EP (1) | EP0375232B1 (de) |
JP (1) | JPH0648683B2 (de) |
CA (1) | CA2005785A1 (de) |
DE (1) | DE68925879T2 (de) |
ES (1) | ES2084606T3 (de) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5354695A (en) * | 1992-04-08 | 1994-10-11 | Leedy Glenn J | Membrane dielectric isolation IC fabrication |
US6714625B1 (en) | 1992-04-08 | 2004-03-30 | Elm Technology Corporation | Lithography device for semiconductor circuit pattern generation |
US5506178A (en) * | 1992-12-25 | 1996-04-09 | Sony Corporation | Process for forming gate silicon oxide film for MOS transistors |
JPH0745603A (ja) * | 1993-07-27 | 1995-02-14 | Shin Etsu Handotai Co Ltd | 半導体装置の製造方法及びその製造工程の管理方法 |
JP3417665B2 (ja) * | 1994-07-07 | 2003-06-16 | 株式会社東芝 | 半導体装置の製造方法 |
KR100187674B1 (ko) * | 1994-07-07 | 1999-06-01 | 김주용 | 반도체 소자 제조용 반응로 및 그를 이용한 게이트 산화막 형성방법 |
JP3542189B2 (ja) * | 1995-03-08 | 2004-07-14 | 株式会社ルネサステクノロジ | 半導体装置の製造方法及び半導体装置 |
US6548854B1 (en) | 1997-12-22 | 2003-04-15 | Agere Systems Inc. | Compound, high-K, gate and capacitor insulator layer |
JPH10209168A (ja) * | 1997-01-24 | 1998-08-07 | Nec Corp | 半導体装置の製造方法 |
US6551857B2 (en) | 1997-04-04 | 2003-04-22 | Elm Technology Corporation | Three dimensional structure integrated circuits |
US5915167A (en) | 1997-04-04 | 1999-06-22 | Elm Technology Corporation | Three dimensional structure memory |
US5851892A (en) * | 1997-05-07 | 1998-12-22 | Cypress Semiconductor Corp. | Fabrication sequence employing an oxide formed with minimized inducted charge and/or maximized breakdown voltage |
US5981403A (en) * | 1997-11-24 | 1999-11-09 | Lucent Technologies, Inc. | Layered silicon nitride deposition process |
US6147388A (en) * | 1997-11-24 | 2000-11-14 | Lucent Technologies, Inc. | Polycide gate structure with intermediate barrier |
US6271153B1 (en) | 1998-07-22 | 2001-08-07 | Micron Technology, Inc. | Semiconductor processing method and trench isolation method |
US6177363B1 (en) * | 1998-09-29 | 2001-01-23 | Lucent Technologies Inc. | Method for forming a nitride layer suitable for use in advanced gate dielectric materials |
US6221790B1 (en) * | 1998-11-19 | 2001-04-24 | Taiwan Semiconductor Manufacturing Company | Stable thin film oxide standard |
US6748994B2 (en) * | 2001-04-11 | 2004-06-15 | Avery Dennison Corporation | Label applicator, method and label therefor |
US7144822B1 (en) * | 2002-02-06 | 2006-12-05 | Novellus Systems, Inc. | High density plasma process for optimum film quality and electrical results |
AU2003255254A1 (en) | 2002-08-08 | 2004-02-25 | Glenn J. Leedy | Vertical system integration |
US7084048B2 (en) * | 2004-05-07 | 2006-08-01 | Memc Electronic Materials, Inc. | Process for metallic contamination reduction in silicon wafers |
JP5996217B2 (ja) * | 2012-03-02 | 2016-09-21 | アルプス電気株式会社 | ガラス複合体、ガラス複合体を用いた入力装置、及び、電子機器 |
RU2539801C1 (ru) * | 2013-07-01 | 2015-01-27 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) | Способ изготовления тонкого слоя диоксида кремния |
RU2688864C1 (ru) * | 2018-03-12 | 2019-05-22 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) | Способ изготовления полупроводникового прибора |
RU2688881C1 (ru) * | 2018-04-18 | 2019-05-22 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) | Способ изготовления полупроводникового прибора |
RU2680989C1 (ru) * | 2018-05-07 | 2019-03-01 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Чеченский государственный университет" | Способ изготовления полупроводникового прибора |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3447238A (en) * | 1965-08-09 | 1969-06-03 | Raytheon Co | Method of making a field effect transistor by diffusion,coating with an oxide and placing a metal layer on the oxide |
US3698948A (en) * | 1968-07-26 | 1972-10-17 | Motorola Inc | Fabrication of a silicon-silicon dioxide interface of predetermined space charge polarity |
US3770498A (en) * | 1971-03-01 | 1973-11-06 | Teledyne Semiconductor | Passivating solution and method |
US4007297A (en) * | 1971-09-20 | 1977-02-08 | Rca Corporation | Method of treating semiconductor device to improve its electrical characteristics |
US3800411A (en) * | 1972-05-22 | 1974-04-02 | Litton Systems Inc | Method of forming a stable mnos igfet |
US3997368A (en) * | 1975-06-24 | 1976-12-14 | Bell Telephone Laboratories, Incorporated | Elimination of stacking faults in silicon devices: a gettering process |
US4048350A (en) * | 1975-09-19 | 1977-09-13 | International Business Machines Corporation | Semiconductor device having reduced surface leakage and methods of manufacture |
JPS5297666A (en) * | 1976-02-12 | 1977-08-16 | Hitachi Ltd | Production of semiconductor device containing pn junctions |
NL7604986A (nl) * | 1976-05-11 | 1977-11-15 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleider- inrichting, en inrichting vervaardigd door toe- passing van de werkwijze. |
US4159917A (en) * | 1977-05-27 | 1979-07-03 | Eastman Kodak Company | Method for use in the manufacture of semiconductor devices |
US4149905A (en) * | 1977-12-27 | 1979-04-17 | Bell Telephone Laboratories, Incorporated | Method of limiting stacking faults in oxidized silicon wafers |
US4140548A (en) * | 1978-05-19 | 1979-02-20 | Maruman Integrated Circuits Inc. | MOS Semiconductor process utilizing a two-layer oxide forming technique |
US4231809A (en) * | 1979-05-25 | 1980-11-04 | Bell Telephone Laboratories, Incorporated | Method of removing impurity metals from semiconductor devices |
DE3206376A1 (de) * | 1982-02-22 | 1983-09-01 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur herstellung von siliziumoxidschichten |
US4548654A (en) * | 1983-06-03 | 1985-10-22 | Motorola, Inc. | Surface denuding of silicon wafer |
US4622082A (en) * | 1984-06-25 | 1986-11-11 | Monsanto Company | Conditioned semiconductor substrates |
DE3516611A1 (de) * | 1985-05-08 | 1986-11-13 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen eines halbleiterschaltkreises |
US4687682A (en) * | 1986-05-02 | 1987-08-18 | American Telephone And Telegraph Company, At&T Technologies, Inc. | Back sealing of silicon wafers |
FR2605647B1 (fr) * | 1986-10-27 | 1993-01-29 | Nissim Yves | Procede de depot en phase vapeur par flash thermique d'une couche isolante sur un substrat en materiau iii-v, application a la fabrication d'une structure mis |
NL8603111A (nl) * | 1986-12-08 | 1988-07-01 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een siliciumplak aan zijn oppervlak wordt voorzien van veldoxidegebieden. |
US4806202A (en) * | 1987-10-05 | 1989-02-21 | Intel Corporation | Field enhanced tunnel oxide on treated substrates |
US4851370A (en) * | 1987-12-28 | 1989-07-25 | American Telephone And Telegraph Company, At&T Bell Laboratories | Fabricating a semiconductor device with low defect density oxide |
US4851358A (en) * | 1988-02-11 | 1989-07-25 | Dns Electronic Materials, Inc. | Semiconductor wafer fabrication with improved control of internal gettering sites using rapid thermal annealing |
US4920076A (en) * | 1988-04-15 | 1990-04-24 | The United States Of America As Represented By The United States Department Of Energy | Method for enhancing growth of SiO2 in Si by the implantation of germanium |
US4894353A (en) * | 1988-04-29 | 1990-01-16 | Advanced Micro Devices, Inc. | Method of fabricating passivated tunnel oxide |
-
1989
- 1989-12-11 ES ES89312879T patent/ES2084606T3/es not_active Expired - Lifetime
- 1989-12-11 DE DE68925879T patent/DE68925879T2/de not_active Expired - Fee Related
- 1989-12-11 EP EP89312879A patent/EP0375232B1/de not_active Expired - Lifetime
- 1989-12-18 CA CA002005785A patent/CA2005785A1/en not_active Abandoned
- 1989-12-21 JP JP1329793A patent/JPH0648683B2/ja not_active Expired - Lifetime
-
1991
- 1991-06-12 US US07/714,360 patent/US5132244A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CA2005785A1 (en) | 1990-06-21 |
EP0375232B1 (de) | 1996-03-06 |
EP0375232A2 (de) | 1990-06-27 |
JPH03129735A (ja) | 1991-06-03 |
US5132244A (en) | 1992-07-21 |
JPH0648683B2 (ja) | 1994-06-22 |
DE68925879T2 (de) | 1996-10-02 |
ES2084606T3 (es) | 1996-05-16 |
EP0375232A3 (en) | 1990-08-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |