DE68923717T2 - Zusammengesetztes Substrat mit niedriger Dielektrizitätskonstante. - Google Patents

Zusammengesetztes Substrat mit niedriger Dielektrizitätskonstante.

Info

Publication number
DE68923717T2
DE68923717T2 DE68923717T DE68923717T DE68923717T2 DE 68923717 T2 DE68923717 T2 DE 68923717T2 DE 68923717 T DE68923717 T DE 68923717T DE 68923717 T DE68923717 T DE 68923717T DE 68923717 T2 DE68923717 T2 DE 68923717T2
Authority
DE
Germany
Prior art keywords
dielectric constant
low dielectric
composite substrate
composite
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68923717T
Other languages
English (en)
Other versions
DE68923717D1 (de
Inventor
Arnold Ivan Baise
Jon Alfred Casey
David Richard Clarke
Renuka Shastri Divakaruni
Werner Ernest Dunkel
James Noel Humenik
Steven Michael Kandetzke
Daniel Patrick Kirby
John Ulrich Knickerbocker
Amy Trestman Matts
Mark Anthony Takacs
Lovell Berry Wiggins
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE68923717D1 publication Critical patent/DE68923717D1/de
Publication of DE68923717T2 publication Critical patent/DE68923717T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857—Multilayer substrates
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/45—Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements
    • C04B41/46—Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements with organic materials
    • C04B41/48—Macromolecular compounds
    • C04B41/488—Other macromolecular compounds obtained otherwise than by reactions only involving unsaturated carbon-to-carbon bonds
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/45—Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements
    • C04B41/46—Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements with organic materials
    • C04B41/49—Compounds having one or more carbon-to-metal or carbon-to-silicon linkages ; Organo-clay compounds; Organo-silicates, i.e. ortho- or polysilicic acid esters ; Organo-phosphorus compounds; Organo-inorganic complexes
    • C04B41/4905—Compounds having one or more carbon-to-metal or carbon-to-silicon linkages ; Organo-clay compounds; Organo-silicates, i.e. ortho- or polysilicic acid esters ; Organo-phosphorus compounds; Organo-inorganic complexes containing silicon
    • C04B41/495—Compounds having one or more carbon-to-metal or carbon-to-silicon linkages ; Organo-clay compounds; Organo-silicates, i.e. ortho- or polysilicic acid esters ; Organo-phosphorus compounds; Organo-inorganic complexes containing silicon applied to the substrate as oligomers or polymers
    • C04B41/4961—Polyorganosiloxanes, i.e. polymers with a Si-O-Si-O-chain; "silicones"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2111/00—Mortars, concrete or artificial stone or mixtures to prepare them, characterised by specific function, property or use
    • C04B2111/00474—Uses not provided for elsewhere in C04B2111/00
    • C04B2111/00663—Uses not provided for elsewhere in C04B2111/00 as filling material for cavities or the like
    • C04B2111/00672—Pointing or jointing materials
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2111/00—Mortars, concrete or artificial stone or mixtures to prepare them, characterised by specific function, property or use
    • C04B2111/00474—Uses not provided for elsewhere in C04B2111/00
    • C04B2111/00844—Uses not provided for elsewhere in C04B2111/00 for electronic applications
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09581—Applying an insulating coating on the walls of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1147—Sealing or impregnating, e.g. of pores
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/308—Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Materials Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structural Engineering (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Laminated Bodies (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Inorganic Insulating Materials (AREA)
DE68923717T 1988-03-11 1989-02-28 Zusammengesetztes Substrat mit niedriger Dielektrizitätskonstante. Expired - Fee Related DE68923717T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US16760688A 1988-03-11 1988-03-11

Publications (2)

Publication Number Publication Date
DE68923717D1 DE68923717D1 (de) 1995-09-14
DE68923717T2 true DE68923717T2 (de) 1996-04-18

Family

ID=22608039

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68923717T Expired - Fee Related DE68923717T2 (de) 1988-03-11 1989-02-28 Zusammengesetztes Substrat mit niedriger Dielektrizitätskonstante.

Country Status (5)

Country Link
US (2) US5135595A (de)
EP (1) EP0332561B1 (de)
JP (1) JPH02148789A (de)
CA (1) CA1308817C (de)
DE (1) DE68923717T2 (de)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10247409A1 (de) * 2002-10-11 2004-04-29 Robert Bosch Gmbh Keramischer Substratkörper und Verfahren zu dessen Herstellung
US7916493B2 (en) 2005-09-30 2011-03-29 Infineon Technologies Ag Power semiconductor module
DE102012216101A1 (de) * 2012-09-12 2014-04-03 Festo Ag & Co. Kg Verfahren zum Herstellen einer in einem Substrat integrierten oder auf einem Substrat aufgebrachten Spule und elektronisches Gerät

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2787953B2 (ja) * 1989-08-03 1998-08-20 イビデン株式会社 電子回路基板
JPH03177376A (ja) * 1989-12-04 1991-08-01 Japan Gore Tex Inc セラミック基板
DE4100145A1 (de) * 1990-01-10 1991-07-11 Murata Manufacturing Co Substrat fuer die montage von integrierten schaltkreisen und es umfassendes elektronisches bauteil
JPH06105836B2 (ja) * 1990-10-05 1994-12-21 富士通株式会社 薄膜多層基板の製造方法
US5283104A (en) * 1991-03-20 1994-02-01 International Business Machines Corporation Via paste compositions and use thereof to form conductive vias in circuitized ceramic substrates
US5798469A (en) * 1992-12-29 1998-08-25 International Business Machines Corporation Non-sintering controlled pattern formation
KR0179404B1 (ko) * 1993-02-02 1999-05-15 모리시타 요이찌 세라믹기판과 그 제조방법
US5489465A (en) * 1994-06-03 1996-02-06 International Business Machines Corporation Edge seal technology for low dielectric/porous substrate processing
US5534830A (en) * 1995-01-03 1996-07-09 R F Prime Corporation Thick film balanced line structure, and microwave baluns, resonators, mixers, splitters, and filters constructed therefrom
US5745017A (en) * 1995-01-03 1998-04-28 Rf Prime Corporation Thick film construct for quadrature translation of RF signals
US5549925A (en) * 1995-06-07 1996-08-27 Hughes Missile Systems Company Hybrid microcircuit glass-to-metal seal repair process
US6194053B1 (en) * 1998-02-26 2001-02-27 International Business Machines Corporation Apparatus and method fabricating buried and flat metal features
CA2334026A1 (en) 1998-06-05 1999-12-09 Paul A. Kohl Porous insulating compounds and method for making same
US6528145B1 (en) * 2000-06-29 2003-03-04 International Business Machines Corporation Polymer and ceramic composite electronic substrates
SG103294A1 (en) * 2000-06-29 2004-04-29 Ibm Polymer and ceramic composite electronic substrate
TWI226103B (en) 2000-08-31 2005-01-01 Georgia Tech Res Inst Fabrication of semiconductor devices with air gaps for ultra low capacitance interconnections and methods of making same
US6629367B2 (en) 2000-12-06 2003-10-07 Motorola, Inc. Electrically isolated via in a multilayer ceramic package
US10390647B2 (en) 2004-04-08 2019-08-27 Parallax Group International, Llc Floor matting
JP5104030B2 (ja) * 2007-05-22 2012-12-19 パナソニック株式会社 多層セラミック基板およびその製造方法
WO2011145455A1 (ja) * 2010-05-21 2011-11-24 株式会社 村田製作所 セラミック体およびその製造方法
KR101153492B1 (ko) * 2010-08-24 2012-06-11 삼성전기주식회사 프로브 카드용 세라믹 기판 제조 방법 및 프로브 카드용 세라믹 기판
DE102013204337A1 (de) * 2013-03-13 2014-09-18 Siemens Aktiengesellschaft Trägerbauteil mit einem Halbleiter-Substrat für elektronische Bauelemente und Verfahren zu dessen Herstellung
WO2020166186A1 (ja) * 2019-02-14 2020-08-20 Ａｇｃ株式会社 発光素子用基板およびその製造方法
KR102262902B1 (ko) 2019-08-23 2021-06-09 삼성전기주식회사 적층 세라믹 커패시터 및 그 제조 방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3700538A (en) * 1970-09-10 1972-10-24 Nasa Polyimide resin-fiberglass cloth laminates for printed circuit boards
US3829356A (en) * 1971-04-16 1974-08-13 Nl Industries Inc Sintered ceramic bodies with porous portions
US4289719A (en) * 1976-12-10 1981-09-15 International Business Machines Corporation Method of making a multi-layer ceramic substrate
JPS57184296A (en) * 1981-05-09 1982-11-12 Hitachi Ltd Ceramic circuit board
JPS60254697A (ja) * 1984-05-31 1985-12-16 富士通株式会社 多層セラミック回路基板および製法
EP0193782A3 (de) * 1985-03-04 1987-11-25 Olin Corporation Mehrschichten- und Steckkontaktenmatrix
EP0196865B1 (de) * 1985-03-27 1990-09-12 Ibiden Co, Ltd. Substrate für elektronische Schaltungen
GB8602331D0 (en) * 1986-01-30 1986-03-05 Ici Plc Multilayer systems
US4865875A (en) * 1986-02-28 1989-09-12 Digital Equipment Corporation Micro-electronics devices and methods of manufacturing same
CA1329952C (en) * 1987-04-27 1994-05-31 Yoshihiko Imanaka Multi-layer superconducting circuit substrate and process for manufacturing same
US5011725A (en) * 1987-05-22 1991-04-30 Ceramics Process Systems Corp. Substrates with dense metal vias produced as co-sintered and porous back-filled vias
US4880684A (en) * 1988-03-11 1989-11-14 International Business Machines Corporation Sealing and stress relief layers and use thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10247409A1 (de) * 2002-10-11 2004-04-29 Robert Bosch Gmbh Keramischer Substratkörper und Verfahren zu dessen Herstellung
DE10247409B4 (de) * 2002-10-11 2008-09-25 Robert Bosch Gmbh Keramischer Substratkörper und Verfahren zu dessen Herstellung
US7916493B2 (en) 2005-09-30 2011-03-29 Infineon Technologies Ag Power semiconductor module
DE102012216101A1 (de) * 2012-09-12 2014-04-03 Festo Ag & Co. Kg Verfahren zum Herstellen einer in einem Substrat integrierten oder auf einem Substrat aufgebrachten Spule und elektronisches Gerät
DE102012216101B4 (de) * 2012-09-12 2016-03-24 Festo Ag & Co. Kg Verfahren zum Herstellen einer in einem Substrat integrierten Spule, Verfahren zur Herstellung einer mehrschichtigen Leiterplatte und elektronisches Gerät

Also Published As

Publication number Publication date
JPH02148789A (ja) 1990-06-07
EP0332561A3 (de) 1991-05-02
US5277725A (en) 1994-01-11
EP0332561B1 (de) 1995-08-09
JPH0563106B2 (de) 1993-09-09
DE68923717D1 (de) 1995-09-14
US5135595A (en) 1992-08-04
CA1308817C (en) 1992-10-13
EP0332561A2 (de) 1989-09-13

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