DE60301208D1 - Volumetrische datenspeichervorrichtung mit mehreren gestapelten matrixadressierbaren speichereinrichtungen - Google Patents

Volumetrische datenspeichervorrichtung mit mehreren gestapelten matrixadressierbaren speichereinrichtungen

Info

Publication number
DE60301208D1
DE60301208D1 DE60301208T DE60301208T DE60301208D1 DE 60301208 D1 DE60301208 D1 DE 60301208D1 DE 60301208 T DE60301208 T DE 60301208T DE 60301208 T DE60301208 T DE 60301208T DE 60301208 D1 DE60301208 D1 DE 60301208D1
Authority
DE
Germany
Prior art keywords
data storage
volumetric data
memory devices
memory
electrode means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60301208T
Other languages
English (en)
Other versions
DE60301208T2 (de
Inventor
I Leistad
Gude Gudesen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ensurge Micropower ASA
Original Assignee
Thin Film Electronics ASA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thin Film Electronics ASA filed Critical Thin Film Electronics ASA
Publication of DE60301208D1 publication Critical patent/DE60301208D1/de
Application granted granted Critical
Publication of DE60301208T2 publication Critical patent/DE60301208T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/14Word line organisation; Word line lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Refuse Collection And Transfer (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Apparatus For Radiation Diagnosis (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Read Only Memory (AREA)
DE60301208T 2002-03-25 2003-03-21 Volumetrische datenspeichervorrichtung mit mehreren gestapelten matrixadressierbaren speichereinrichtungen Expired - Fee Related DE60301208T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
NO20021466A NO316637B1 (no) 2002-03-25 2002-03-25 Volumetrisk datalagringsapparat
NO20021466 2002-03-25
PCT/NO2003/000097 WO2003081602A1 (en) 2002-03-25 2003-03-21 A volumetric data storage apparatus comprising a plurality of stacked matrix-addressable memory devices

Publications (2)

Publication Number Publication Date
DE60301208D1 true DE60301208D1 (de) 2005-09-08
DE60301208T2 DE60301208T2 (de) 2006-04-13

Family

ID=19913461

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60301208T Expired - Fee Related DE60301208T2 (de) 2002-03-25 2003-03-21 Volumetrische datenspeichervorrichtung mit mehreren gestapelten matrixadressierbaren speichereinrichtungen

Country Status (14)

Country Link
US (1) US6952361B2 (de)
EP (1) EP1488427B1 (de)
JP (1) JP2005521255A (de)
KR (1) KR20040111435A (de)
CN (1) CN1643616A (de)
AT (1) ATE301327T1 (de)
AU (1) AU2003215967A1 (de)
CA (1) CA2480307A1 (de)
DE (1) DE60301208T2 (de)
DK (1) DK1488427T3 (de)
ES (1) ES2247552T3 (de)
NO (1) NO316637B1 (de)
RU (1) RU2275699C2 (de)
WO (1) WO2003081602A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6756620B2 (en) * 2001-06-29 2004-06-29 Intel Corporation Low-voltage and interface damage-free polymer memory device
NO20052128L (no) * 2005-04-29 2006-10-30 Thin Film Electronics Asa Minneinnretning og fremgangsmater for drift av denne
KR101547328B1 (ko) 2009-09-25 2015-08-25 삼성전자주식회사 강유전체 메모리 소자 및 그 동작 방법
RU2625023C2 (ru) * 2015-11-12 2017-07-11 Дмитриенко Владимир Григорьевич Способ обмена данными с ячейками памяти или иных устройств и их адресации
CN109378313B (zh) * 2018-09-23 2020-10-30 复旦大学 一种低功耗三维非易失性存储器及其制备方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NO20005980L (no) * 2000-11-27 2002-05-28 Thin Film Electronics Ab Ferroelektrisk minnekrets og fremgangsmåte ved dens fremstilling
US6858862B2 (en) * 2001-06-29 2005-02-22 Intel Corporation Discrete polymer memory array and method of making same
US6775173B2 (en) * 2001-11-28 2004-08-10 Hans Gude Gudesen Matrix-addressable apparatus with one or more memory devices

Also Published As

Publication number Publication date
WO2003081602A1 (en) 2003-10-02
DE60301208T2 (de) 2006-04-13
CA2480307A1 (en) 2003-10-02
AU2003215967A1 (en) 2003-10-08
ATE301327T1 (de) 2005-08-15
EP1488427B1 (de) 2005-08-03
RU2004126964A (ru) 2005-06-10
EP1488427A1 (de) 2004-12-22
US6952361B2 (en) 2005-10-04
NO20021466D0 (no) 2002-03-25
DK1488427T3 (da) 2005-11-28
NO20021466L (no) 2003-09-26
ES2247552T3 (es) 2006-03-01
JP2005521255A (ja) 2005-07-14
NO316637B1 (no) 2004-03-15
CN1643616A (zh) 2005-07-20
KR20040111435A (ko) 2004-12-31
RU2275699C2 (ru) 2006-04-27
US20040004887A1 (en) 2004-01-08

Similar Documents

Publication Publication Date Title
SG10201806761YA (en) Cell bottom node reset in a memory array
DE60316190D1 (de) Speichersystem mit speichermodulen und mehrerer speicherbänke
US6965523B2 (en) Multilevel memory device with memory cells storing non-power of two voltage levels
EP1359587A3 (de) Speicherzellenmatrizen
TW200623395A (en) Stacked semiconductor memory device
DE602004023194D1 (de) GESTAPELTE 1T-n SPEICHERZELLENSTRUKTUR
CO4890897A1 (es) Computadora conectada en poligono formacion en la misma
EP0929077A3 (de) Halbleiterspeicher mit eingebautem parallelen Bitprüfmodus
DE602005010419D1 (de) Gelatchte programmierung von speicher und verfahren
ATE242536T1 (de) Dram mit integralem sram sowie systeme und verfahren zu deren benutzung
DE50000882D1 (de) Speicheranordnung mit adressverwürfelung
TW200731286A (en) Electronic memory with binary storage elements
TW200620281A (en) MRAM with staggered cell structure
TW200514094A (en) Stacked 1t-nmemory cell structure
TW200501160A (en) Multi-level memory device and methods for programming and reading the same
EP1553601A3 (de) Verfahren und Anordnung für einen hochdichten magnetischen Direktzugriffspeicher mit stapelbare Architektur.
WO2004061863A3 (en) Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
DE60301208D1 (de) Volumetrische datenspeichervorrichtung mit mehreren gestapelten matrixadressierbaren speichereinrichtungen
TW200636721A (en) Memory device with pre-fetch circuit and pre-fetch method
SG131754A1 (en) Semiconductor storage device and information apparatus
JP2006155710A5 (de)
CA2373460A1 (en) Improved multilevel dram
TW200636737A (en) Three-dimensional memory devices and methods of manufacturing and operating the same
TW200615948A (en) Redundancy circuits and memory devices having a twist bitline scheme and methods of repairing defective cells in the same
KR920001555A (ko) Dram 용장 메모리 및 이의 교체 방법

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee