DE60209485D1 - Hochgeschwindigkeitsabtasthalteschaltung mit verstärkung - Google Patents
Hochgeschwindigkeitsabtasthalteschaltung mit verstärkungInfo
- Publication number
- DE60209485D1 DE60209485D1 DE60209485T DE60209485T DE60209485D1 DE 60209485 D1 DE60209485 D1 DE 60209485D1 DE 60209485 T DE60209485 T DE 60209485T DE 60209485 T DE60209485 T DE 60209485T DE 60209485 D1 DE60209485 D1 DE 60209485D1
- Authority
- DE
- Germany
- Prior art keywords
- reinforcement
- high speed
- touch control
- speed ability
- ability touch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/02—Sample-and-hold arrangements
- G11C27/024—Sample-and-hold arrangements using a capacitive memory element
- G11C27/026—Sample-and-hold arrangements using a capacitive memory element associated with an amplifier
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/02—Sample-and-hold arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US866378 | 2001-05-25 | ||
US09/866,378 US6480128B1 (en) | 2001-05-25 | 2001-05-25 | High-speed sample-and-hold circuit with gain |
PCT/US2002/016763 WO2002097999A1 (en) | 2001-05-25 | 2002-05-24 | High-speed sample-and-hold circuit with gain |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60209485D1 true DE60209485D1 (de) | 2006-04-27 |
DE60209485T2 DE60209485T2 (de) | 2006-09-21 |
Family
ID=25347481
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60209485T Expired - Lifetime DE60209485T2 (de) | 2001-05-25 | 2002-05-24 | Hochgeschwindigkeitsabtasthalteschaltung mit verstärkung |
Country Status (5)
Country | Link |
---|---|
US (1) | US6480128B1 (de) |
EP (1) | EP1402646B1 (de) |
CN (1) | CN100409574C (de) |
DE (1) | DE60209485T2 (de) |
WO (1) | WO2002097999A1 (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10064207A1 (de) * | 2000-12-22 | 2002-07-11 | Infineon Technologies Ag | Schaltungsanordnung zur rauscharmen volldifferenziellen Verstärkung |
US6552865B2 (en) * | 2001-05-25 | 2003-04-22 | Infineon Technologies Ag | Diagnostic system for a read/write channel in a disk drive |
KR20050103541A (ko) * | 2004-04-26 | 2005-11-01 | 엘지전자 주식회사 | 클럭 부스팅을 이용한 아날로그-디지털 변환기 |
JP4372111B2 (ja) * | 2005-03-04 | 2009-11-25 | 三洋電機株式会社 | アナログデジタル変換器 |
US8143921B2 (en) * | 2009-08-03 | 2012-03-27 | Freescale Semiconductor, Inc. | Latched comparator and methods therefor |
TWI473102B (zh) * | 2011-09-22 | 2015-02-11 | Univ Nat Taipei Technology | High speed, high linear BiCMOS sample and hold circuit |
US9553569B1 (en) * | 2015-02-04 | 2017-01-24 | Inphi Corporation | Low power buffer with dynamic gain control |
EP3229372B1 (de) * | 2016-04-06 | 2019-06-26 | NXP USA, Inc. | System und verfahren zur direkten kopplung an einen analog-digital-wandler mit geringerer spannungsreferenz |
EP3429083B1 (de) | 2017-07-13 | 2020-09-02 | ams International AG | Verfahren und schaltkreis zur stromintegration |
US10375336B2 (en) | 2017-08-02 | 2019-08-06 | Semiconductor Components Industries, Llc | Methods and apparatus for a track and hold amplifier |
US10396724B1 (en) * | 2018-05-30 | 2019-08-27 | Semiconductor Components Industries, Llc | Amplifier with common mode loop and chop |
KR102663077B1 (ko) * | 2022-08-30 | 2024-05-03 | 연세대학교 산학협력단 | 고선형성을 갖는 트랙 앤 홀드 회로 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5162670A (en) * | 1990-01-26 | 1992-11-10 | Kabushiki Kaisha Toshiba | Sample-and-hold circuit device |
US5134403A (en) * | 1990-12-06 | 1992-07-28 | Hewlett-Packard Co. | High speed sampling and digitizing system requiring no hold circuit |
EP0901058A1 (de) * | 1991-10-30 | 1999-03-10 | Harris Corporation | Zweistufiger Stromspiegel |
JP2570185B2 (ja) * | 1994-07-08 | 1997-01-08 | 日本電気株式会社 | サンプルホールド回路 |
US6198314B1 (en) * | 1999-01-25 | 2001-03-06 | Motorola Inc. | Sample and hold circuit and method therefor |
-
2001
- 2001-05-25 US US09/866,378 patent/US6480128B1/en not_active Expired - Lifetime
-
2002
- 2002-05-24 WO PCT/US2002/016763 patent/WO2002097999A1/en not_active Application Discontinuation
- 2002-05-24 EP EP02734563A patent/EP1402646B1/de not_active Expired - Fee Related
- 2002-05-24 CN CNB028106261A patent/CN100409574C/zh not_active Expired - Fee Related
- 2002-05-24 DE DE60209485T patent/DE60209485T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6480128B1 (en) | 2002-11-12 |
EP1402646A1 (de) | 2004-03-31 |
EP1402646B1 (de) | 2006-03-01 |
CN1557051A (zh) | 2004-12-22 |
DE60209485T2 (de) | 2006-09-21 |
CN100409574C (zh) | 2008-08-06 |
US20020175844A1 (en) | 2002-11-28 |
WO2002097999A1 (en) | 2002-12-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |