DE60205266D1 - Datenschreibvorrichtung, datenschreibverfahren und programm - Google Patents

Datenschreibvorrichtung, datenschreibverfahren und programm

Info

Publication number
DE60205266D1
DE60205266D1 DE60205266T DE60205266T DE60205266D1 DE 60205266 D1 DE60205266 D1 DE 60205266D1 DE 60205266 T DE60205266 T DE 60205266T DE 60205266 T DE60205266 T DE 60205266T DE 60205266 D1 DE60205266 D1 DE 60205266D1
Authority
DE
Germany
Prior art keywords
data writing
data
storage devices
program
writing apparatus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60205266T
Other languages
English (en)
Other versions
DE60205266T8 (de
DE60205266T2 (de
Inventor
Takeo Yoshii
Masahiko Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Device Ltd
Original Assignee
Tokyo Electron Device Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Device Ltd filed Critical Tokyo Electron Device Ltd
Publication of DE60205266D1 publication Critical patent/DE60205266D1/de
Application granted granted Critical
Publication of DE60205266T2 publication Critical patent/DE60205266T2/de
Publication of DE60205266T8 publication Critical patent/DE60205266T8/de
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/88Masking faults in memories by using spares or by reconfiguring with partially good memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/102External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/88Masking faults in memories by using spares or by reconfiguring with partially good memories
    • G11C29/883Masking faults in memories by using spares or by reconfiguring with partially good memories using a single defective memory device with reduced capacity, e.g. half capacity
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/76Masking faults in memories by using spares or by reconfiguring using address translation or modifications

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Numerical Control (AREA)
DE60205266T 2001-09-28 2002-09-27 Datenschreibvorrichtung, datenschreibverfahren und programm Expired - Fee Related DE60205266T8 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2001301789 2001-09-28
JP2001301789A JP3822081B2 (ja) 2001-09-28 2001-09-28 データ書込装置、データ書込制御方法及びプログラム
PCT/JP2002/010064 WO2003030181A1 (en) 2001-09-28 2002-09-27 Data writing apparatus, data writing method, and program

Publications (3)

Publication Number Publication Date
DE60205266D1 true DE60205266D1 (de) 2005-09-01
DE60205266T2 DE60205266T2 (de) 2006-03-30
DE60205266T8 DE60205266T8 (de) 2006-06-08

Family

ID=19122146

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60205266T Expired - Fee Related DE60205266T8 (de) 2001-09-28 2002-09-27 Datenschreibvorrichtung, datenschreibverfahren und programm

Country Status (6)

Country Link
US (1) US7191296B2 (de)
EP (1) EP1433183B1 (de)
JP (1) JP3822081B2 (de)
AT (1) ATE300784T1 (de)
DE (1) DE60205266T8 (de)
WO (1) WO2003030181A1 (de)

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JP4534498B2 (ja) 2004-01-28 2010-09-01 ソニー株式会社 半導体装置およびその起動処理方法
JP4561110B2 (ja) * 2004-01-29 2010-10-13 Tdk株式会社 メモリコントローラ及びメモリコントローラを備えるフラッシュメモリシステム、並びに、フラッシュメモリの制御方法
US7861059B2 (en) * 2004-02-03 2010-12-28 Nextest Systems Corporation Method for testing and programming memory devices and system for same
TW200604810A (en) * 2004-02-20 2006-02-01 Renesas Tech Corp Nonvolatile memory and data processing system
US7644239B2 (en) 2004-05-03 2010-01-05 Microsoft Corporation Non-volatile memory cache performance improvement
KR100632947B1 (ko) 2004-07-20 2006-10-12 삼성전자주식회사 불 휘발성 메모리 장치 및 그것의 프로그램 방법
FR2874440B1 (fr) 2004-08-17 2008-04-25 Oberthur Card Syst Sa Procede et dispositif de traitement de donnees
US7490197B2 (en) 2004-10-21 2009-02-10 Microsoft Corporation Using external memory devices to improve system performance
KR100704628B1 (ko) 2005-03-25 2007-04-09 삼성전자주식회사 다수의 스트링을 사용하여 상태 정보를 저장하는 방법 및비휘발성 저장 장치
JP4842563B2 (ja) * 2005-05-16 2011-12-21 パナソニック株式会社 メモリコントローラ、不揮発性記憶装置、不揮発性記憶システム、及びデータ書き込み方法
JP4859402B2 (ja) * 2005-07-04 2012-01-25 株式会社アドバンテスト 試験装置、及び製造方法
US8914557B2 (en) 2005-12-16 2014-12-16 Microsoft Corporation Optimizing write and wear performance for a memory
US7609561B2 (en) * 2006-01-18 2009-10-27 Apple Inc. Disabling faulty flash memory dies
US7793059B2 (en) * 2006-01-18 2010-09-07 Apple Inc. Interleaving policies for flash memory
US20070174641A1 (en) * 2006-01-25 2007-07-26 Cornwell Michael J Adjusting power supplies for data storage devices
US7702935B2 (en) * 2006-01-25 2010-04-20 Apple Inc. Reporting flash memory operating voltages
US7861122B2 (en) * 2006-01-27 2010-12-28 Apple Inc. Monitoring health of non-volatile memory
US8170402B2 (en) * 2006-04-07 2012-05-01 Cinegest, Inc. Portable high capacity digital data storage device
US7558131B2 (en) * 2006-05-18 2009-07-07 Micron Technology, Inc. NAND system with a data write frequency greater than a command-and-address-load frequency
US20080010510A1 (en) * 2006-06-19 2008-01-10 Tony Turner Method and system for using multiple memory regions for redundant remapping
JP4956068B2 (ja) * 2006-06-30 2012-06-20 株式会社東芝 半導体記憶装置およびその制御方法
KR100851545B1 (ko) 2006-12-29 2008-08-11 삼성전자주식회사 커맨드 및 어드레스 핀을 갖는 낸드 플래시 메모리 및그것을 포함한 플래시 메모리 시스템
US7913032B1 (en) 2007-04-25 2011-03-22 Apple Inc. Initiating memory wear leveling
US20080288712A1 (en) * 2007-04-25 2008-11-20 Cornwell Michael J Accessing metadata with an external host
KR101433861B1 (ko) * 2007-10-22 2014-08-27 삼성전자주식회사 메모리 시스템 및 그 구동방법
US8631203B2 (en) 2007-12-10 2014-01-14 Microsoft Corporation Management of external memory functioning as virtual cache
US9032151B2 (en) 2008-09-15 2015-05-12 Microsoft Technology Licensing, Llc Method and system for ensuring reliability of cache data and metadata subsequent to a reboot
US8032707B2 (en) 2008-09-15 2011-10-04 Microsoft Corporation Managing cache data and metadata
US7953774B2 (en) 2008-09-19 2011-05-31 Microsoft Corporation Aggregation of write traffic to a data store
US8838876B2 (en) 2008-10-13 2014-09-16 Micron Technology, Inc. Translation layer in a solid state storage device
JP2010134741A (ja) * 2008-12-05 2010-06-17 Internatl Business Mach Corp <Ibm> プログラムを実行する方法およびシステム
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JP2012182788A (ja) * 2011-02-10 2012-09-20 Panasonic Corp 記録システム、記録方法およびコンピュータプログラム
US9037931B2 (en) * 2011-12-21 2015-05-19 Advanced Micro Devices, Inc. Methods and systems for logic device defect tolerant redundancy
EP2608211A1 (de) * 2011-12-22 2013-06-26 Fluiditech IP Limited Verfahren zum Testen eines Flash-Speichers
US20130166795A1 (en) * 2011-12-23 2013-06-27 Stec, Inc. System and method for streaming data in flash memory applications
US20150205541A1 (en) * 2014-01-20 2015-07-23 Samya Systems, Inc. High-capacity solid state disk drives

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US5353256A (en) * 1993-06-30 1994-10-04 Intel Corporation Block specific status information in a memory device
JP3589033B2 (ja) 1998-06-25 2004-11-17 東京エレクトロンデバイス株式会社 フラッシュメモリシステム
JP3597393B2 (ja) 1998-08-19 2004-12-08 シャープ株式会社 データ記録再生装置
JP2000276367A (ja) 1999-03-23 2000-10-06 Advantest Corp データ書込装置、データ書込方法、及び試験装置
KR100330164B1 (ko) 1999-04-27 2002-03-28 윤종용 무효 블록들을 가지는 복수의 플래시 메모리들을 동시에 프로그램하는 방법
US6535780B1 (en) * 1999-11-10 2003-03-18 Data I/O Corporation High speed programmer system
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US6528843B1 (en) * 2002-05-03 2003-03-04 Silicon Based Technology Corp. Self-aligned split-gate flash memory cell having a single-side tip-shaped floating-gate structure and its contactless flash memory arrays

Also Published As

Publication number Publication date
DE60205266T8 (de) 2006-06-08
ATE300784T1 (de) 2005-08-15
EP1433183B1 (de) 2005-07-27
WO2003030181A1 (en) 2003-04-10
US7191296B2 (en) 2007-03-13
JP2003109384A (ja) 2003-04-11
DE60205266T2 (de) 2006-03-30
JP3822081B2 (ja) 2006-09-13
EP1433183A1 (de) 2004-06-30
US20040172576A1 (en) 2004-09-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee