DE602008001176D1 - Taktwiederherstellungsvorrichtung - Google Patents

Taktwiederherstellungsvorrichtung

Info

Publication number
DE602008001176D1
DE602008001176D1 DE602008001176T DE602008001176T DE602008001176D1 DE 602008001176 D1 DE602008001176 D1 DE 602008001176D1 DE 602008001176 T DE602008001176 T DE 602008001176T DE 602008001176 T DE602008001176 T DE 602008001176T DE 602008001176 D1 DE602008001176 D1 DE 602008001176D1
Authority
DE
Germany
Prior art keywords
recovery device
clock recovery
clock
recovery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602008001176T
Other languages
English (en)
Inventor
Hiroshi Sugawara
Katsuya Ikezawa
Toshiaki Kobayashi
Yasukazu Akasaka
Akira Toyama
Toshimichi Suzuki
Hirotoshi Kodaka
Tsuyoshi Yakihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Publication of DE602008001176D1 publication Critical patent/DE602008001176D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H04L7/0276—Self-sustaining, e.g. by tuned delay line and a feedback path to a logical gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Manipulation Of Pulses (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
DE602008001176T 2007-02-28 2008-02-26 Taktwiederherstellungsvorrichtung Active DE602008001176D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007049027A JP5103940B2 (ja) 2007-02-28 2007-02-28 クロック再生装置

Publications (1)

Publication Number Publication Date
DE602008001176D1 true DE602008001176D1 (de) 2010-06-24

Family

ID=39415068

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602008001176T Active DE602008001176D1 (de) 2007-02-28 2008-02-26 Taktwiederherstellungsvorrichtung

Country Status (4)

Country Link
US (1) US7965800B2 (de)
EP (1) EP1965537B1 (de)
JP (1) JP5103940B2 (de)
DE (1) DE602008001176D1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102611440B (zh) * 2012-03-12 2014-02-12 东南大学 基于门控振荡器的超高速突发模式时钟恢复电路
US8922150B1 (en) * 2012-07-18 2014-12-30 The Johns Hopkins University Differential serial driver
JP6032082B2 (ja) * 2013-03-25 2016-11-24 富士通株式会社 受信回路及び半導体集積回路
US9923643B2 (en) * 2013-12-13 2018-03-20 Silicon Laboratories Inc. Techniques for reduced jitter in digital isolators
US11689174B2 (en) 2021-06-01 2023-06-27 Skyworks Solutions, Inc. Isolation communications channel using direct demodulation and data-edge encoding

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6331314A (ja) * 1986-07-25 1988-02-10 Toshiba Corp 位相同期回路
US5237290A (en) * 1992-05-08 1993-08-17 At&T Bell Laboratories Method and apparatus for clock recovery
JP3346442B2 (ja) 1995-02-07 2002-11-18 日本電信電話株式会社 タイミング抽出回路
US6018273A (en) * 1997-10-15 2000-01-25 Zilog, Inc. Externally-synchronized voltage-controlled oscillator in phase locked loop
US6208183B1 (en) * 1999-04-30 2001-03-27 Conexant Systems, Inc. Gated delay-locked loop for clock generation applications
US6259326B1 (en) * 1999-08-24 2001-07-10 Agere Systems Guardian Corp. Clock recovery from a burst-mode digital signal each packet of which may have one of several predefined frequencies
KR100603180B1 (ko) * 2004-08-06 2006-07-20 학교법인 포항공과대학교 주파수 트래킹 기법을 이용한 씨모오스 버스트 모드 클럭데이터 복원 회로
TWI277302B (en) * 2004-12-28 2007-03-21 Ind Tech Res Inst Clock and data recovery circuit
JP4850453B2 (ja) 2005-08-11 2012-01-11 ローム株式会社 半導体発光装置の製造方法及び半導体発光装置
US7667544B2 (en) * 2006-01-12 2010-02-23 Yokogawa Electric Corporation Clock reproducing apparatus

Also Published As

Publication number Publication date
JP2008211742A (ja) 2008-09-11
US20080205564A1 (en) 2008-08-28
US7965800B2 (en) 2011-06-21
JP5103940B2 (ja) 2012-12-19
EP1965537A1 (de) 2008-09-03
EP1965537B1 (de) 2010-05-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition