DE602007007871D1 - - Google Patents
Info
- Publication number
- DE602007007871D1 DE602007007871D1 DE200760007871 DE602007007871T DE602007007871D1 DE 602007007871 D1 DE602007007871 D1 DE 602007007871D1 DE 200760007871 DE200760007871 DE 200760007871 DE 602007007871 T DE602007007871 T DE 602007007871T DE 602007007871 D1 DE602007007871 D1 DE 602007007871D1
- Authority
- DE
- Germany
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/967—Semiconductor on specified insulator
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/31504—Composite [nonstructural laminate]
- Y10T428/31551—Of polyamidoester [polyurethane, polyisocyanate, polycarbamate, etc.]
- Y10T428/31609—Particulate metal or metal compound-containing
- Y10T428/31612—As silicone, silane or siloxane
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006305665A JP5044195B2 (ja) | 2006-11-10 | 2006-11-10 | Soq基板の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602007007871D1 true DE602007007871D1 (de) | 2010-09-02 |
Family
ID=39166645
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE200760007871 Active DE602007007871D1 (de) | 2006-11-10 | 2007-11-06 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7732867B2 (de) |
EP (1) | EP1921672B1 (de) |
JP (1) | JP5044195B2 (de) |
CN (1) | CN101179054B (de) |
DE (1) | DE602007007871D1 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5496598B2 (ja) * | 2008-10-31 | 2014-05-21 | 信越化学工業株式会社 | シリコン薄膜転写絶縁性ウェーハの製造方法 |
JP2012250907A (ja) * | 2011-06-02 | 2012-12-20 | Samsung Corning Precision Materials Co Ltd | 自立基板の製造方法 |
GB201114365D0 (en) | 2011-08-22 | 2011-10-05 | Univ Surrey | Method of manufacture of an optoelectronic device and an optoelectronic device manufactured using the method |
CN102779739B (zh) * | 2012-07-12 | 2015-04-15 | 清华大学 | 功率半导体器件背面制造工艺 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5395788A (en) | 1991-03-15 | 1995-03-07 | Shin Etsu Handotai Co., Ltd. | Method of producing semiconductor substrate |
FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
JPH11307747A (ja) * | 1998-04-17 | 1999-11-05 | Nec Corp | Soi基板およびその製造方法 |
JP4540160B2 (ja) * | 1999-12-27 | 2010-09-08 | 京セラ株式会社 | 黒色系焼結石英 |
CN100350571C (zh) | 2002-04-04 | 2007-11-21 | 东曹株式会社 | 石英玻璃喷镀部件及其制造方法 |
JP4204398B2 (ja) * | 2002-07-31 | 2009-01-07 | 信越石英株式会社 | 石英ガラスの製造方法 |
WO2004050570A1 (ja) * | 2002-11-29 | 2004-06-17 | Shin-Etsu Quartz Products Co., Ltd. | 合成石英ガラスの製造方法及び合成石英ガラス体 |
US7176528B2 (en) * | 2003-02-18 | 2007-02-13 | Corning Incorporated | Glass-based SOI structures |
ATE393473T1 (de) * | 2004-06-11 | 2008-05-15 | Soitec Silicon On Insulator | Verfahren zur herstellung eines verbundsubstrats |
JP5183874B2 (ja) * | 2004-12-28 | 2013-04-17 | 信越化学工業株式会社 | Soiウエーハの製造方法 |
JP2007081145A (ja) * | 2005-09-14 | 2007-03-29 | Tosoh Corp | ダミーウエハー |
FR2896619B1 (fr) * | 2006-01-23 | 2008-05-23 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat composite a proprietes electriques ameliorees |
-
2006
- 2006-11-10 JP JP2006305665A patent/JP5044195B2/ja not_active Expired - Fee Related
-
2007
- 2007-11-02 US US11/979,447 patent/US7732867B2/en active Active
- 2007-11-06 EP EP20070021588 patent/EP1921672B1/de active Active
- 2007-11-06 DE DE200760007871 patent/DE602007007871D1/de active Active
- 2007-11-09 CN CN2007101700665A patent/CN101179054B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN101179054A (zh) | 2008-05-14 |
JP2008124208A (ja) | 2008-05-29 |
CN101179054B (zh) | 2012-05-30 |
EP1921672B1 (de) | 2010-07-21 |
US7732867B2 (en) | 2010-06-08 |
JP5044195B2 (ja) | 2012-10-10 |
EP1921672A3 (de) | 2009-07-22 |
EP1921672A2 (de) | 2008-05-14 |
US20080118757A1 (en) | 2008-05-22 |
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