DE602007006639D1 - Elektronische schaltung mit einer speichermatrix zcher daten - Google Patents

Elektronische schaltung mit einer speichermatrix zcher daten

Info

Publication number
DE602007006639D1
DE602007006639D1 DE602007006639T DE602007006639T DE602007006639D1 DE 602007006639 D1 DE602007006639 D1 DE 602007006639D1 DE 602007006639 T DE602007006639 T DE 602007006639T DE 602007006639 T DE602007006639 T DE 602007006639T DE 602007006639 D1 DE602007006639 D1 DE 602007006639D1
Authority
DE
Germany
Prior art keywords
data
extra
error
extra data
retrieval unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602007006639T
Other languages
English (en)
Inventor
Acht Victor M Van
Nicolaas Lambert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Publication of DE602007006639D1 publication Critical patent/DE602007006639D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
  • Credit Cards Or The Like (AREA)
DE602007006639T 2006-03-07 2007-03-05 Elektronische schaltung mit einer speichermatrix zcher daten Active DE602007006639D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP06110785 2006-03-07
PCT/IB2007/050719 WO2007102117A2 (en) 2006-03-07 2007-03-05 Electronic circuit with a memory matrix that stores pages including extra data

Publications (1)

Publication Number Publication Date
DE602007006639D1 true DE602007006639D1 (de) 2010-07-01

Family

ID=38328517

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602007006639T Active DE602007006639D1 (de) 2006-03-07 2007-03-05 Elektronische schaltung mit einer speichermatrix zcher daten

Country Status (7)

Country Link
US (1) US7913110B2 (de)
EP (1) EP1994470B1 (de)
JP (1) JP2009529172A (de)
CN (1) CN101395583B (de)
AT (1) ATE468558T1 (de)
DE (1) DE602007006639D1 (de)
WO (1) WO2007102117A2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100781520B1 (ko) * 2006-02-24 2007-12-03 삼성전자주식회사 비휘발성 메모리가 캐쉬로 사용되는 저장 장치 및 이를위한 맵핑 정보 복구 방법
US8190973B2 (en) * 2007-12-21 2012-05-29 Arm Limited Apparatus and method for error correction of data values in a storage device
US8869009B2 (en) * 2013-02-11 2014-10-21 Apple Inc. Read commands specifying error performance
TWI528362B (zh) * 2013-05-30 2016-04-01 鈺創科技股份有限公司 靜態隨機存取記憶體系統及其操作方法
JP6600146B2 (ja) * 2015-03-27 2019-10-30 ルネサスエレクトロニクス株式会社 データ処理回路及びエラー訂正方法
KR20170030207A (ko) * 2015-09-09 2017-03-17 에스케이하이닉스 주식회사 메모리 장치
CN106776104B (zh) * 2016-11-11 2020-04-03 大唐微电子技术有限公司 一种Nand Flash控制器和终端以及控制Nand Flash的方法
CN106601305A (zh) * 2016-11-18 2017-04-26 华中科技大学 一种使用检错码和纠错码相结合的固态盘纠错方法
CN106776087B (zh) * 2016-11-22 2020-05-26 青岛海信移动通信技术股份有限公司 终端设备及其开机方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4817095A (en) * 1987-05-15 1989-03-28 Digital Equipment Corporation Byte write error code method and apparatus
US5774643A (en) * 1995-10-13 1998-06-30 Digital Equipment Corporation Enhanced raid write hole protection and recovery
US5805799A (en) * 1995-12-01 1998-09-08 Quantum Corporation Data integrity and cross-check code with logical block address
US5978953A (en) * 1996-12-19 1999-11-02 Compaq Computer Corporation error detection and correction
US5956743A (en) * 1997-08-25 1999-09-21 Bit Microsystems, Inc. Transparent management at host interface of flash-memory overhead-bytes using flash-specific DMA having programmable processor-interrupt of high-level operations
EP1496519B1 (de) * 1998-01-21 2006-08-23 Sony Corporation Kodierungsverfahren und Speicheranordnung
US6772383B1 (en) * 1999-05-27 2004-08-03 Intel Corporation Combined tag and data ECC for enhanced soft error recovery from cache tag errors
US6701480B1 (en) * 2000-03-08 2004-03-02 Rockwell Automation Technologies, Inc. System and method for providing error check and correction in memory systems
US6463506B1 (en) * 2000-04-29 2002-10-08 Hewlett-Packard Company Arrangement of data within cache lines so that tags are first data received
JP3853615B2 (ja) * 2001-07-04 2006-12-06 シャープ株式会社 アドレス情報検出装置およびアドレス情報検出方法
US6971041B2 (en) * 2002-03-04 2005-11-29 International Business Machines Corporation Cache entry error-correcting code (ECC) based at least on cache entry data and memory address
US20040083334A1 (en) * 2002-10-28 2004-04-29 Sandisk Corporation Method and apparatus for managing the integrity of data in non-volatile memory system

Also Published As

Publication number Publication date
US7913110B2 (en) 2011-03-22
EP1994470A2 (de) 2008-11-26
JP2009529172A (ja) 2009-08-13
US20090070637A1 (en) 2009-03-12
WO2007102117A3 (en) 2007-11-15
WO2007102117A2 (en) 2007-09-13
CN101395583B (zh) 2011-03-23
CN101395583A (zh) 2009-03-25
EP1994470B1 (de) 2010-05-19
ATE468558T1 (de) 2010-06-15

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