DE602006019770D1 - Verfahren zur herstellung eines halbleiterbauelements und mit einem solchen verfahren erhaltenes halbleiterbauelement - Google Patents

Verfahren zur herstellung eines halbleiterbauelements und mit einem solchen verfahren erhaltenes halbleiterbauelement

Info

Publication number
DE602006019770D1
DE602006019770D1 DE602006019770T DE602006019770T DE602006019770D1 DE 602006019770 D1 DE602006019770 D1 DE 602006019770D1 DE 602006019770 T DE602006019770 T DE 602006019770T DE 602006019770 T DE602006019770 T DE 602006019770T DE 602006019770 D1 DE602006019770 D1 DE 602006019770D1
Authority
DE
Germany
Prior art keywords
semiconductor
region
opening
semiconductor layer
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006019770T
Other languages
English (en)
Inventor
Joost Melai
Erwin Hijzen
Philippe Meunier-Beillard
Johannes J Donkers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Publication of DE602006019770D1 publication Critical patent/DE602006019770D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66242Heterojunction transistors [HBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66272Silicon vertical transistors
    • H01L29/66287Silicon vertical transistors with a single crystalline emitter, collector or base including extrinsic, link or graft base formed on the silicon substrate, e.g. by epitaxy, recrystallisation, after insulating device isolation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
DE602006019770T 2005-11-21 2006-10-29 Verfahren zur herstellung eines halbleiterbauelements und mit einem solchen verfahren erhaltenes halbleiterbauelement Active DE602006019770D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP05110997 2005-11-21
PCT/IB2006/053996 WO2007057803A1 (en) 2005-11-21 2006-10-29 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method

Publications (1)

Publication Number Publication Date
DE602006019770D1 true DE602006019770D1 (de) 2011-03-03

Family

ID=37772906

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006019770T Active DE602006019770D1 (de) 2005-11-21 2006-10-29 Verfahren zur herstellung eines halbleiterbauelements und mit einem solchen verfahren erhaltenes halbleiterbauelement

Country Status (7)

Country Link
US (1) US8173511B2 (de)
EP (1) EP1955367B1 (de)
JP (1) JP2009516912A (de)
CN (1) CN101313394B (de)
AT (1) ATE496393T1 (de)
DE (1) DE602006019770D1 (de)
WO (1) WO2007057803A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8431966B2 (en) 2008-05-21 2013-04-30 Nxp B.V. Method of manufacturing a bipolar transistor semiconductor device and semiconductor devices obtained thereby
US8729662B2 (en) * 2008-09-12 2014-05-20 Semiconductor Components Industries, Llc Semiconductor device and manufacturing method thereof
EP2372754B1 (de) * 2010-04-01 2018-03-14 Nxp B.V. Abstandshalterstruktur bei der Herstellung von flachen Bipolartransistoren
EP2506297A1 (de) * 2011-03-29 2012-10-03 Nxp B.V. Bi-CMOS-Vorrichtung und Verfahren
CN109887996B (zh) * 2019-01-31 2022-03-08 上海华虹宏力半导体制造有限公司 自对准锗硅hbt器件的制造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1267092A (zh) * 1999-03-10 2000-09-20 光磊科技股份有限公司 光电晶体
FR2805923B1 (fr) * 2000-03-06 2002-05-24 St Microelectronics Sa Procede de fabrication d'un transistor bipolaire double- polysilicium auto-aligne
TW515106B (en) * 2000-09-13 2002-12-21 Toshiba Corp Bipolar transistor, semiconductor light emitting device and semiconductor device
EP1512172B1 (de) * 2002-05-29 2010-04-28 Nxp B.V. Verfahren zur herstellung eines sige heteroübergang-bipolartransistors
JP2007501512A (ja) * 2003-08-01 2007-01-25 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ バイポーラ・トランジスタを有する半導体装置の製造方法及びバイポーラ・トランジスタを有する装置
FR2868203B1 (fr) * 2004-03-29 2006-06-09 St Microelectronics Sa Procede de fabrication d'un transistor bipolaire a base extrinseque monocristalline

Also Published As

Publication number Publication date
CN101313394B (zh) 2011-10-05
US20100289022A1 (en) 2010-11-18
EP1955367B1 (de) 2011-01-19
US8173511B2 (en) 2012-05-08
JP2009516912A (ja) 2009-04-23
EP1955367A1 (de) 2008-08-13
CN101313394A (zh) 2008-11-26
WO2007057803A1 (en) 2007-05-24
ATE496393T1 (de) 2011-02-15

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