DE602006017866D1 - Last-first-modus und verfahren zum programmieren von nichtflüchtigem speicher des nand-typs mit verringerter programmstörung - Google Patents
Last-first-modus und verfahren zum programmieren von nichtflüchtigem speicher des nand-typs mit verringerter programmstörungInfo
- Publication number
- DE602006017866D1 DE602006017866D1 DE602006017866T DE602006017866T DE602006017866D1 DE 602006017866 D1 DE602006017866 D1 DE 602006017866D1 DE 602006017866 T DE602006017866 T DE 602006017866T DE 602006017866 T DE602006017866 T DE 602006017866T DE 602006017866 D1 DE602006017866 D1 DE 602006017866D1
- Authority
- DE
- Germany
- Prior art keywords
- boosting
- memory
- programmed
- word lines
- nand type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- PWPJGUXAGUPAHP-UHFFFAOYSA-N lufenuron Chemical compound C1=C(Cl)C(OC(F)(F)C(C(F)(F)F)F)=CC(Cl)=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F PWPJGUXAGUPAHP-UHFFFAOYSA-N 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
- G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/5648—Multilevel memory programming, reading or erasing operations wherein the order or sequence of the operations is relevant
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Read Only Memory (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/223,623 US7218552B1 (en) | 2005-09-09 | 2005-09-09 | Last-first mode and method for programming of non-volatile memory with reduced program disturb |
US11/223,273 US7170788B1 (en) | 2005-09-09 | 2005-09-09 | Last-first mode and apparatus for programming of non-volatile memory with reduced program disturb |
PCT/US2006/034711 WO2007030536A1 (en) | 2005-09-09 | 2006-09-06 | Last-first mode and method for programming of non-volatile memory of nand type with reduced program disturb |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602006017866D1 true DE602006017866D1 (de) | 2010-12-09 |
Family
ID=37596287
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602006017866T Active DE602006017866D1 (de) | 2005-09-09 | 2006-09-06 | Last-first-modus und verfahren zum programmieren von nichtflüchtigem speicher des nand-typs mit verringerter programmstörung |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP1943652B1 (de) |
JP (1) | JP4726958B2 (de) |
KR (1) | KR100984563B1 (de) |
AT (1) | ATE486350T1 (de) |
DE (1) | DE602006017866D1 (de) |
TW (1) | TWI312155B (de) |
WO (1) | WO2007030536A1 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7949821B2 (en) * | 2008-06-12 | 2011-05-24 | Micron Technology, Inc. | Method of storing data on a flash memory device |
US7983078B2 (en) * | 2008-09-24 | 2011-07-19 | Sandisk Technologies Inc. | Data retention of last word line of non-volatile memory arrays |
KR101586047B1 (ko) * | 2009-03-25 | 2016-01-18 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 프로그램 방법 |
KR101734204B1 (ko) * | 2010-06-01 | 2017-05-12 | 삼성전자주식회사 | 프로그램 시퀀서를 포함하는 플래시 메모리 장치 및 시스템, 그리고 그것의 프로그램 방법 |
KR102003930B1 (ko) * | 2012-07-31 | 2019-07-25 | 삼성전자주식회사 | 불휘발성 메모리 장치의 데이터 라이팅 제어방법 및 웨어레벨링 제어 기능을 가지는 메모리 콘트롤러 |
KR102393323B1 (ko) * | 2015-08-24 | 2022-05-03 | 삼성전자주식회사 | 재사용 주기를 이용하여 사용자 데이터를 쓰기 위한 워드라인을 결정하는 저장 장치의 동작 방법 |
US9728262B2 (en) | 2015-10-30 | 2017-08-08 | Sandisk Technologies Llc | Non-volatile memory systems with multi-write direction memory units |
US10910061B2 (en) * | 2018-03-14 | 2021-02-02 | Silicon Storage Technology, Inc. | Method and apparatus for programming analog neural memory in a deep learning artificial neural network |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100272037B1 (ko) | 1997-02-27 | 2000-12-01 | 니시무로 타이죠 | 불휘발성 반도체 기억 장치 |
JP3863485B2 (ja) | 2002-11-29 | 2006-12-27 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP4398750B2 (ja) * | 2004-02-17 | 2010-01-13 | 株式会社東芝 | Nand型フラッシュメモリ |
-
2006
- 2006-09-06 JP JP2008530168A patent/JP4726958B2/ja active Active
- 2006-09-06 DE DE602006017866T patent/DE602006017866D1/de active Active
- 2006-09-06 AT AT06790184T patent/ATE486350T1/de not_active IP Right Cessation
- 2006-09-06 KR KR1020087008515A patent/KR100984563B1/ko active IP Right Grant
- 2006-09-06 EP EP06790184A patent/EP1943652B1/de not_active Not-in-force
- 2006-09-06 WO PCT/US2006/034711 patent/WO2007030536A1/en active Application Filing
- 2006-09-08 TW TW095133161A patent/TWI312155B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP1943652B1 (de) | 2010-10-27 |
TW200735106A (en) | 2007-09-16 |
ATE486350T1 (de) | 2010-11-15 |
TWI312155B (en) | 2009-07-11 |
KR20080100416A (ko) | 2008-11-18 |
JP2009508286A (ja) | 2009-02-26 |
KR100984563B1 (ko) | 2010-10-01 |
JP4726958B2 (ja) | 2011-07-20 |
EP1943652A1 (de) | 2008-07-16 |
WO2007030536A1 (en) | 2007-03-15 |
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Legal Events
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