DE602004000226D1 - Parallele Prüfung von Intergrierten Schaltungen - Google Patents

Parallele Prüfung von Intergrierten Schaltungen

Info

Publication number
DE602004000226D1
DE602004000226D1 DE602004000226T DE602004000226T DE602004000226D1 DE 602004000226 D1 DE602004000226 D1 DE 602004000226D1 DE 602004000226 T DE602004000226 T DE 602004000226T DE 602004000226 T DE602004000226 T DE 602004000226T DE 602004000226 D1 DE602004000226 D1 DE 602004000226D1
Authority
DE
Germany
Prior art keywords
integrated circuits
testing equipment
parallel
parallel testing
wait
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004000226T
Other languages
English (en)
Other versions
DE602004000226T2 (de
Inventor
Sylvie Wuidart
Claude Zahra
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of DE602004000226D1 publication Critical patent/DE602004000226D1/de
Application granted granted Critical
Publication of DE602004000226T2 publication Critical patent/DE602004000226T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505Test of Modular systems, e.g. Wafers, MCM's
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/3193Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937Timing aspects, e.g. measuring propagation delay
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/26Accessing multiple arrays
    • G11C2029/2602Concurrent test
DE602004000226T 2003-01-28 2004-01-27 Parallele Prüfung von Intergrierten Schaltungen Expired - Lifetime DE602004000226T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0300934 2003-01-28
FR0300934A FR2850464A1 (fr) 2003-01-28 2003-01-28 Test en parallele de circuits integres

Publications (2)

Publication Number Publication Date
DE602004000226D1 true DE602004000226D1 (de) 2006-01-19
DE602004000226T2 DE602004000226T2 (de) 2006-07-06

Family

ID=32605950

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004000226T Expired - Lifetime DE602004000226T2 (de) 2003-01-28 2004-01-27 Parallele Prüfung von Intergrierten Schaltungen

Country Status (5)

Country Link
US (1) US6937049B2 (de)
EP (1) EP1445621B1 (de)
JP (1) JP2004233354A (de)
DE (1) DE602004000226T2 (de)
FR (1) FR2850464A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7528622B2 (en) 2005-07-06 2009-05-05 Optimal Test Ltd. Methods for slow test time detection of an integrated circuit during parallel testing
DE102005056279A1 (de) * 2005-11-25 2007-05-31 Infineon Technologies Ag Test-Vorrichtung und Verfahren zum Testen von elektronischen Bauelementen
US8112249B2 (en) * 2008-12-22 2012-02-07 Optimaltest Ltd. System and methods for parametric test time reduction
CN102081139A (zh) * 2009-11-30 2011-06-01 上海华虹Nec电子有限公司 半导体测试中精确计算等待时间的方法
CN102012480B (zh) * 2010-09-21 2014-04-02 上海大学 多级排序算法运用于片上系统内嵌逻辑芯核测试调度的方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2733058B1 (fr) * 1995-04-11 1997-05-30 Schlumberger Ind Sa Procede et equipement de test automatique en parallele de composants electroniques
US5996099A (en) 1995-04-11 1999-11-30 Schlumberger Industries Method and apparatus for automatically testing electronic components in parallel utilizing different timing signals for each electronic component
JP3598609B2 (ja) * 1995-09-20 2004-12-08 双葉電子工業株式会社 スペクトル拡散通信システムにおける受信装置
US6466007B1 (en) * 2000-08-14 2002-10-15 Teradyne, Inc. Test system for smart card and indentification devices and the like
US6359826B1 (en) * 2000-11-20 2002-03-19 Silicon Access Technology, Inc. Method and a system for controlling a data sense amplifier for a memory chip
JP3851782B2 (ja) * 2001-03-07 2006-11-29 株式会社東芝 半導体集積回路及びそのテスト方法

Also Published As

Publication number Publication date
DE602004000226T2 (de) 2006-07-06
EP1445621A1 (de) 2004-08-11
EP1445621B1 (de) 2005-12-14
US20040193978A1 (en) 2004-09-30
JP2004233354A (ja) 2004-08-19
US6937049B2 (en) 2005-08-30
FR2850464A1 (fr) 2004-07-30

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