DE60135788D1 - Nicht auf zweierpotenz basierendes gray-code zählersystem mit einem binären incrementierer mit zweiseitig symmetrisch verteilten zahlen - Google Patents
Nicht auf zweierpotenz basierendes gray-code zählersystem mit einem binären incrementierer mit zweiseitig symmetrisch verteilten zahlenInfo
- Publication number
- DE60135788D1 DE60135788D1 DE60135788T DE60135788T DE60135788D1 DE 60135788 D1 DE60135788 D1 DE 60135788D1 DE 60135788 T DE60135788 T DE 60135788T DE 60135788 T DE60135788 T DE 60135788T DE 60135788 D1 DE60135788 D1 DE 60135788D1
- Authority
- DE
- Germany
- Prior art keywords
- gray
- code
- pointer
- power
- modulo
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
- G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
- G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/004—Counters counting in a non-natural counting order, e.g. random counters
- H03K23/005—Counters counting in a non-natural counting order, e.g. random counters using minimum change code, e.g. Gray Code
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F2205/10—Indexing scheme relating to groups G06F5/10 - G06F5/14
- G06F2205/102—Avoiding metastability, i.e. preventing hazards, e.g. by using Gray code counters
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F2205/10—Indexing scheme relating to groups G06F5/10 - G06F5/14
- G06F2205/106—Details of pointers, i.e. structure of the address generators
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Position Fixing By Use Of Radio Waves (AREA)
- Radio Relay Systems (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/644,348 US6337893B1 (en) | 1999-11-04 | 2000-08-23 | Non-power-of-two grey-code counter system having binary incrementer with counts distributed with bilateral symmetry |
PCT/EP2001/009573 WO2002017494A2 (en) | 2000-08-23 | 2001-08-17 | Non-power-of-two grey-code counter system having binary incrementer with counts distributed with bilateral symmetry |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60135788D1 true DE60135788D1 (de) | 2008-10-23 |
Family
ID=24584508
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60135788T Expired - Lifetime DE60135788D1 (de) | 2000-08-23 | 2001-08-17 | Nicht auf zweierpotenz basierendes gray-code zählersystem mit einem binären incrementierer mit zweiseitig symmetrisch verteilten zahlen |
Country Status (6)
Country | Link |
---|---|
US (1) | US6337893B1 (de) |
EP (1) | EP1410509B1 (de) |
JP (1) | JP2004507824A (de) |
AT (1) | ATE408275T1 (de) |
DE (1) | DE60135788D1 (de) |
WO (1) | WO2002017494A2 (de) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6857043B1 (en) * | 2000-04-28 | 2005-02-15 | Altera Corporation | Shift register implementations of first-in/first-out memories utilizing a double increment gray code counter |
GB2366880B (en) * | 2000-09-15 | 2005-01-05 | Mitel Corp | Method of Validating Data in Circular Buffers |
US6553448B1 (en) * | 2001-03-01 | 2003-04-22 | 3Com Corporation | Method for unit distance encoding of asynchronous pointers for non-power-of-two sized buffers |
CA2357443A1 (en) * | 2001-09-13 | 2003-03-13 | Pmc-Sierra Ltd. | Gray code sequences |
US6845414B2 (en) * | 2002-03-15 | 2005-01-18 | Silicon Integrated Systems Corp. | Apparatus and method of asynchronous FIFO control |
JP2003283331A (ja) * | 2002-03-25 | 2003-10-03 | Oki Electric Ind Co Ltd | グレイコード・カウンタ |
US6801143B2 (en) * | 2002-06-28 | 2004-10-05 | Intel Corporation | Method and apparatus for generating gray code for any even count value to enable efficient pointer exchange mechanisms in asynchronous FIFO'S |
US6762701B2 (en) * | 2002-12-16 | 2004-07-13 | Broadcom | Scalable gray code counter and applications thereof |
US7194500B2 (en) * | 2003-07-11 | 2007-03-20 | Sony Corporation | Scalable gray code counter |
US7668983B2 (en) * | 2003-10-24 | 2010-02-23 | Broadcom Corporation | System for designing data structures |
US20050091470A1 (en) * | 2003-10-24 | 2005-04-28 | Anand Pande | Calculation of gray codes using exhaustive combinations |
US7149956B1 (en) | 2004-02-09 | 2006-12-12 | Pericom Semiconductor Corp. | Converging error-recovery for multi-bit-incrementing gray code |
US6934198B1 (en) | 2004-05-04 | 2005-08-23 | Xilinx, Inc. | First-in, first-out buffer system in an integrated circuit |
US6937172B1 (en) * | 2004-05-04 | 2005-08-30 | Xilinx, Inc. | Method and system for gray-coding counting |
US7254677B1 (en) | 2004-05-04 | 2007-08-07 | Xilinx, Inc. | First-in, first-out memory system with reduced cycle latency |
US7148825B2 (en) * | 2004-05-10 | 2006-12-12 | Broadcom Corporation | Data interface including gray coding |
US7106226B2 (en) * | 2004-09-28 | 2006-09-12 | Mediatek, Inc. | Determination of key bit positions in gray codes |
US7346739B1 (en) | 2004-11-19 | 2008-03-18 | Xilinx, Inc. | First-in-first-out memory system and method for providing same |
US8416793B2 (en) | 2005-03-29 | 2013-04-09 | Alcatel Lucent | Method and apparatus for queue depth detection in a memory system |
US7359276B1 (en) | 2005-09-27 | 2008-04-15 | Xilinx, Inc. | Multi-port system for communication between processing elements |
US7796062B1 (en) * | 2007-10-17 | 2010-09-14 | Tellabs San Jose, Inc. | Method and apparatus for providing non-power-of-two even count gray code |
JP5091911B2 (ja) * | 2009-05-15 | 2012-12-05 | 川崎マイクロエレクトロニクス株式会社 | コード変換回路およびカウンタ |
US8966416B2 (en) | 2013-03-07 | 2015-02-24 | Cadence Design Systems, Inc. | Finite-state machine encoding during design synthesis |
US9710415B2 (en) | 2014-11-03 | 2017-07-18 | Nxp Usa, Inc. | Asynchronous FIFO buffer with Johnson code write pointer |
US11010293B1 (en) * | 2018-01-23 | 2021-05-18 | Marvell Israel (M.I.S.L) Ltd. | Register-based asynchronous FIFO with asymmetric size |
IT201800003008A1 (it) | 2018-02-23 | 2019-08-23 | St Microelectronics Srl | Un circuito di conversione da binario a gray, relativi memoria fifo, circuito integrato e procedimento |
US11693663B2 (en) * | 2020-10-23 | 2023-07-04 | Ut-Battelle, Llc | Circular queue management with split indexes |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4780894A (en) * | 1987-04-17 | 1988-10-25 | Lsi Logic Corporation | N-bit gray code counter |
US5084841A (en) * | 1989-08-14 | 1992-01-28 | Texas Instruments Incorporated | Programmable status flag generator FIFO using gray code |
US5045854A (en) * | 1990-03-01 | 1991-09-03 | Hewlett-Packard Company | Integrated high speed synchronous counter with asynchronous read-out |
JPH05189199A (ja) * | 1991-06-21 | 1993-07-30 | Texas Instr Inc <Ti> | 標識発生装置 |
US5355396A (en) * | 1991-12-30 | 1994-10-11 | Texas Instruments Incorporated | Circuitry and method for modularized single transition counting |
JP3266684B2 (ja) * | 1991-12-30 | 2002-03-18 | テキサス インスツルメンツ インコーポレイテツド | 可変単一遷移カウント回路並びに方法 |
US5220586A (en) * | 1991-12-30 | 1993-06-15 | Texas Instruments Incorporated | Circuitry and method for variable single transition counting |
US5426756A (en) * | 1992-08-11 | 1995-06-20 | S3, Incorporated | Memory controller and method determining empty/full status of a FIFO memory using gray code counters |
JP3088302B2 (ja) * | 1996-08-19 | 2000-09-18 | 日本電気株式会社 | バイナリカウンタ読み出し回路 |
US5754614A (en) | 1997-04-03 | 1998-05-19 | Vlsi Technology, Inc. | Gray code counter |
-
2000
- 2000-08-23 US US09/644,348 patent/US6337893B1/en not_active Expired - Fee Related
-
2001
- 2001-08-17 EP EP01978284A patent/EP1410509B1/de not_active Expired - Lifetime
- 2001-08-17 WO PCT/EP2001/009573 patent/WO2002017494A2/en active IP Right Grant
- 2001-08-17 AT AT01978284T patent/ATE408275T1/de not_active IP Right Cessation
- 2001-08-17 DE DE60135788T patent/DE60135788D1/de not_active Expired - Lifetime
- 2001-08-17 JP JP2002522071A patent/JP2004507824A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JP2004507824A (ja) | 2004-03-11 |
EP1410509B1 (de) | 2008-09-10 |
ATE408275T1 (de) | 2008-09-15 |
WO2002017494A3 (en) | 2004-02-26 |
WO2002017494A2 (en) | 2002-02-28 |
US6337893B1 (en) | 2002-01-08 |
EP1410509A2 (de) | 2004-04-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |