DE60135368D1 - Wafer mit integrierten schaltungen und rissunterbrechungselementen - Google Patents

Wafer mit integrierten schaltungen und rissunterbrechungselementen

Info

Publication number
DE60135368D1
DE60135368D1 DE60135368T DE60135368T DE60135368D1 DE 60135368 D1 DE60135368 D1 DE 60135368D1 DE 60135368 T DE60135368 T DE 60135368T DE 60135368 T DE60135368 T DE 60135368T DE 60135368 D1 DE60135368 D1 DE 60135368D1
Authority
DE
Germany
Prior art keywords
rip
wafer
integrated circuits
interrupt elements
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60135368T
Other languages
English (en)
Inventor
William Guthrie
Andreas Kluwe
Michael Ruprecht
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Infineon Technologies North America Corp
Original Assignee
International Business Machines Corp
Infineon Technologies North America Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp, Infineon Technologies North America Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE60135368D1 publication Critical patent/DE60135368D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE60135368T 2000-11-21 2001-11-13 Wafer mit integrierten schaltungen und rissunterbrechungselementen Expired - Fee Related DE60135368D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/717,970 US6492247B1 (en) 2000-11-21 2000-11-21 Method for eliminating crack damage induced by delaminating gate conductor interfaces in integrated circuits
PCT/US2001/051206 WO2002045166A2 (en) 2000-11-21 2001-11-13 Method for eliminating crack damage at interfaces in integrated circuits

Publications (1)

Publication Number Publication Date
DE60135368D1 true DE60135368D1 (de) 2008-09-25

Family

ID=24884265

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60135368T Expired - Fee Related DE60135368D1 (de) 2000-11-21 2001-11-13 Wafer mit integrierten schaltungen und rissunterbrechungselementen

Country Status (5)

Country Link
US (1) US6492247B1 (de)
EP (1) EP1336200B1 (de)
KR (1) KR100403065B1 (de)
DE (1) DE60135368D1 (de)
WO (1) WO2002045166A2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7109093B2 (en) * 2004-03-22 2006-09-19 International Business Machines Corporation Crackstop with release layer for crack control in semiconductors
EP1774587B1 (de) * 2004-07-26 2009-10-07 Nxp B.V. Wafer mit verbesserten leitenden schleifen im ritzrahmen
US7382038B2 (en) * 2006-03-22 2008-06-03 United Microelectronics Corp. Semiconductor wafer and method for making the same
US7544602B2 (en) * 2007-03-29 2009-06-09 International Business Machines Corporation Method and structure for ultra narrow crack stop for multilevel semiconductor device
US7955955B2 (en) * 2007-05-10 2011-06-07 International Business Machines Corporation Using crack arrestor for inhibiting damage from dicing and chip packaging interaction failures in back end of line structures
US8309957B2 (en) * 2009-04-16 2012-11-13 Texas Instruments Incorporated Replacement of scribeline padframe with saw-friendly design
US8124448B2 (en) * 2009-09-18 2012-02-28 Advanced Micro Devices, Inc. Semiconductor chip with crack deflection structure
JP5849478B2 (ja) * 2011-07-11 2016-01-27 富士通セミコンダクター株式会社 半導体装置および試験方法
TWI495074B (zh) 2012-11-30 2015-08-01 Ind Tech Res Inst 減能結構
US9589911B1 (en) 2015-08-27 2017-03-07 Globalfoundries Inc. Integrated circuit structure with metal crack stop and methods of forming same
US9589912B1 (en) 2015-08-27 2017-03-07 Globalfoundries Inc. Integrated circuit structure with crack stop and method of forming same
US9831194B1 (en) * 2016-07-06 2017-11-28 Globalfoundries Inc. Edge compression layers
CN110858578B (zh) 2018-08-23 2021-07-13 联华电子股份有限公司 管芯封环及其制造方法
US20200075508A1 (en) 2018-08-29 2020-03-05 Toshiba Memory Corporation Semiconductor device
JP7240149B2 (ja) 2018-08-29 2023-03-15 キオクシア株式会社 半導体装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5096855A (en) 1988-05-23 1992-03-17 U.S. Philips Corporation Method of dicing semiconductor wafers which produces shards less than 10 microns in size
JP3144817B2 (ja) * 1990-03-23 2001-03-12 株式会社東芝 半導体装置
JP2776457B2 (ja) 1992-12-29 1998-07-16 インターナショナル・ビジネス・マシーンズ・コーポレイション 半導体デバイスのクラックストップ形成方法及び半導体デバイス
JPH08172062A (ja) * 1994-12-16 1996-07-02 Oki Electric Ind Co Ltd 半導体ウエハ及び半導体ウエハの製造方法
US5659189A (en) 1995-06-07 1997-08-19 Lsi Logic Corporation Layout configuration for an integrated circuit gate array
US5994762A (en) * 1996-07-26 1999-11-30 Hitachi, Ltd. Semiconductor integrated circuit device including boron-doped phospho silicate glass layer and manufacturing method thereof
JP3482779B2 (ja) * 1996-08-20 2004-01-06 セイコーエプソン株式会社 半導体装置およびその製造方法
KR19980057588A (ko) * 1996-12-30 1998-09-25 문정환 칩 크랙 방지용 보호 장치
US5789302A (en) 1997-03-24 1998-08-04 Siemens Aktiengesellschaft Crack stops
KR19990017980A (ko) * 1997-08-26 1999-03-15 구본준 웨이퍼 소잉방법
JPH1174229A (ja) * 1997-08-29 1999-03-16 Toshiba Microelectron Corp 半導体装置
US6022791A (en) * 1997-10-15 2000-02-08 International Business Machines Corporation Chip crack stop
US6365958B1 (en) * 1998-02-06 2002-04-02 Texas Instruments Incorporated Sacrificial structures for arresting insulator cracks in semiconductor devices
US6372661B1 (en) * 2000-07-14 2002-04-16 Taiwan Semiconductor Manufacturing Company Method to improve the crack resistance of CVD low-k dielectric constant material

Also Published As

Publication number Publication date
EP1336200B1 (de) 2008-08-13
KR20020039607A (ko) 2002-05-27
WO2002045166A3 (en) 2003-06-05
US6492247B1 (en) 2002-12-10
KR100403065B1 (ko) 2003-10-23
EP1336200A2 (de) 2003-08-20
WO2002045166A2 (en) 2002-06-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee