DE60105261D1 - Voller spannungshub eingangs-/voller spannungshub ausgangs- zweirichtungsverstärker für hoch resistive oder hoch kapazitive zweirichtungssignalleitungen und verfahren dafür - Google Patents

Voller spannungshub eingangs-/voller spannungshub ausgangs- zweirichtungsverstärker für hoch resistive oder hoch kapazitive zweirichtungssignalleitungen und verfahren dafür

Info

Publication number
DE60105261D1
DE60105261D1 DE60105261T DE60105261T DE60105261D1 DE 60105261 D1 DE60105261 D1 DE 60105261D1 DE 60105261 T DE60105261 T DE 60105261T DE 60105261 T DE60105261 T DE 60105261T DE 60105261 D1 DE60105261 D1 DE 60105261D1
Authority
DE
Germany
Prior art keywords
full voltage
voltage stroke
way
resistive
capacitive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60105261T
Other languages
English (en)
Inventor
Gerhard Mueller
R Hanson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
International Business Machines Corp
Original Assignee
Infineon Technologies AG
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG, International Business Machines Corp filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE60105261D1 publication Critical patent/DE60105261D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B9/00—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor
    • B24B9/02—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground
    • B24B9/06—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
    • B24B9/065—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain of thin, brittle parts, e.g. semiconductors, wafers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018592—Coupling arrangements; Interface arrangements using field effect transistors only with a bidirectional operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Mechanical Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
  • Bidirectional Digital Transmission (AREA)
  • Amplifiers (AREA)
  • Dc Digital Transmission (AREA)
DE60105261T 2000-01-27 2001-01-26 Voller spannungshub eingangs-/voller spannungshub ausgangs- zweirichtungsverstärker für hoch resistive oder hoch kapazitive zweirichtungssignalleitungen und verfahren dafür Expired - Lifetime DE60105261D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/491,635 US6313663B1 (en) 1998-03-09 2000-01-27 Full swing voltage input/full swing output bi-directional repeaters for high resistance or high capacitance bi-directional signal lines and methods therefor
PCT/US2001/002610 WO2001056031A2 (en) 2000-01-27 2001-01-26 Full swing voltage input/full swing voltage output bi-directional repeaters for high resistance or high capacitance bi-directional signal lines and methods therefor

Publications (1)

Publication Number Publication Date
DE60105261D1 true DE60105261D1 (de) 2004-10-07

Family

ID=23953029

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60105261T Expired - Lifetime DE60105261D1 (de) 2000-01-27 2001-01-26 Voller spannungshub eingangs-/voller spannungshub ausgangs- zweirichtungsverstärker für hoch resistive oder hoch kapazitive zweirichtungssignalleitungen und verfahren dafür

Country Status (6)

Country Link
US (1) US6313663B1 (de)
EP (1) EP1252628B1 (de)
KR (1) KR20020088068A (de)
DE (1) DE60105261D1 (de)
TW (1) TW514932B (de)
WO (1) WO2001056031A2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6853233B1 (en) * 2000-09-13 2005-02-08 Infineon Technologies Ag Level-shifting circuitry having “high” output impedance during disable mode
US6515516B2 (en) 2001-01-22 2003-02-04 Micron Technology, Inc. System and method for improving signal propagation
US6815984B1 (en) * 2001-08-27 2004-11-09 Cypress Semiconductor Corp. Push/pull multiplexer bit
US6690198B2 (en) * 2002-04-02 2004-02-10 Infineon Technologies Ag Repeater with reduced power consumption
KR100891322B1 (ko) * 2002-09-25 2009-03-31 삼성전자주식회사 데이터 입력 마진을 개선할 수 있는 동시 양방향 입출력회로
JP4010229B2 (ja) * 2002-11-22 2007-11-21 ソニー株式会社 双方向信号伝送回路
KR100543907B1 (ko) * 2003-06-25 2006-01-20 주식회사 하이닉스반도체 반도체 메모리 소자의 양방향 버스 리피터
US20090027081A1 (en) * 2007-07-25 2009-01-29 International Business Machines Corporation Eight Transistor Tri-State Driver Implementing Cascade Structures To Reduce Peak Current Consumption, Layout Area and Slew Rate
KR100909631B1 (ko) * 2007-12-18 2009-07-27 주식회사 하이닉스반도체 글로벌 입출력 라인의 리피터
US7929329B2 (en) 2009-01-14 2011-04-19 Micron Technology, Inc. Memory bank signal coupling buffer and method
WO2012160963A1 (en) 2011-05-20 2012-11-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
TWI473072B (zh) * 2013-06-24 2015-02-11 Orise Technology Co Ltd 減少閂鎖元件數量的源極驅動裝置
EP3574584B1 (de) * 2017-01-24 2024-01-24 Telefonaktiebolaget LM Ericsson (publ) Variable verzögerungsschaltungen

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5121358A (en) * 1990-09-26 1992-06-09 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with power-on reset controlled latched row line repeaters
US5218240A (en) * 1990-11-02 1993-06-08 Concurrent Logic, Inc. Programmable logic cell and array with bus repeaters
US5179299A (en) * 1990-11-05 1993-01-12 Ncr Corporation Cmos low output voltage bus driver
US5202593A (en) * 1991-10-30 1993-04-13 I-Cube Design Systems Inc. Bi-directional bus repeater
US5414312A (en) * 1993-07-15 1995-05-09 Altera Corporation Advanced signal driving buffer with directional input transition detection
US5517135A (en) * 1995-07-26 1996-05-14 Xilinx, Inc. Bidirectional tristate buffer with default input
US5736870A (en) * 1995-12-28 1998-04-07 Intel Corporation Method and apparatus for bi-directional bus driver
US5801549A (en) * 1996-12-13 1998-09-01 International Business Machines Corporation Simultaneous transmission bidirectional repeater and initialization mechanism
US6181165B1 (en) * 1998-03-09 2001-01-30 Siemens Aktiengesellschaft Reduced voltage input/reduced voltage output tri-state buffers
US6137167A (en) * 1998-11-24 2000-10-24 Micron Technology, Inc. Multichip module with built in repeaters and method

Also Published As

Publication number Publication date
WO2001056031A3 (en) 2002-03-07
US6313663B1 (en) 2001-11-06
TW514932B (en) 2002-12-21
KR20020088068A (ko) 2002-11-25
WO2001056031A2 (en) 2001-08-02
EP1252628B1 (de) 2004-09-01
EP1252628A2 (de) 2002-10-30

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