DE60043565D1 - Speicher mit Spaltenregister und Schreibverfahren hierfür - Google Patents

Speicher mit Spaltenregister und Schreibverfahren hierfür

Info

Publication number
DE60043565D1
DE60043565D1 DE60043565T DE60043565T DE60043565D1 DE 60043565 D1 DE60043565 D1 DE 60043565D1 DE 60043565 T DE60043565 T DE 60043565T DE 60043565 T DE60043565 T DE 60043565T DE 60043565 D1 DE60043565 D1 DE 60043565D1
Authority
DE
Germany
Prior art keywords
memory
writing method
column register
register
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60043565T
Other languages
English (en)
Inventor
Sebastien Zink
Bertrand Bertrand
David Naura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Application granted granted Critical
Publication of DE60043565D1 publication Critical patent/DE60043565D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
DE60043565T 1999-09-29 2000-09-05 Speicher mit Spaltenregister und Schreibverfahren hierfür Expired - Lifetime DE60043565D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9912149A FR2799043B1 (fr) 1999-09-29 1999-09-29 Registre de colonnes, memoire l'incorporant, et procede d'ecriture dans une telle memoire

Publications (1)

Publication Number Publication Date
DE60043565D1 true DE60043565D1 (de) 2010-02-04

Family

ID=9550375

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60043565T Expired - Lifetime DE60043565D1 (de) 1999-09-29 2000-09-05 Speicher mit Spaltenregister und Schreibverfahren hierfür

Country Status (4)

Country Link
US (2) US6307792B1 (de)
EP (1) EP1089290B1 (de)
DE (1) DE60043565D1 (de)
FR (1) FR2799043B1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2799043B1 (fr) * 1999-09-29 2001-12-14 St Microelectronics Sa Registre de colonnes, memoire l'incorporant, et procede d'ecriture dans une telle memoire
US7141817B2 (en) 2001-11-30 2006-11-28 Semiconductor Energy Laboratory Co., Ltd. Light emitting device

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4388702A (en) * 1981-08-21 1983-06-14 Mostek Corporation Multi-bit read only memory circuit
JP2534733B2 (ja) * 1987-10-09 1996-09-18 日本電気株式会社 不揮発性半導体記憶装置
US5363330A (en) * 1991-01-28 1994-11-08 Mitsubishi Denki Kabushiki Kaisha Non-volatile semiconductor memory device incorporating data latch and address counter for page mode programming
US6026505A (en) * 1991-10-16 2000-02-15 International Business Machines Corporation Method and apparatus for real time two dimensional redundancy allocation
US5587951A (en) * 1995-08-04 1996-12-24 Atmel Corporation High speed, low voltage non-volatile memory
KR0172441B1 (ko) * 1995-09-19 1999-03-30 김광호 불휘발성 반도체 메모리의 프로그램 방법
US5835414A (en) * 1996-06-14 1998-11-10 Macronix International Co., Ltd. Page mode program, program verify, read and erase verify for floating gate memory device with low current page buffer
US5812463A (en) * 1997-08-26 1998-09-22 Integrated Silicon Solution, Inc. System and method for a high speed, high voltage latch for memory devices
US6052305A (en) * 1997-08-30 2000-04-18 Hyundai Electronics Industries Co., Ltd. Erasing circuit for a flash memory device having a triple well structure
US6032248A (en) * 1998-04-29 2000-02-29 Atmel Corporation Microcontroller including a single memory module having a data memory sector and a code memory sector and supporting simultaneous read/write access to both sectors
US5999451A (en) * 1998-07-13 1999-12-07 Macronix International Co., Ltd. Byte-wide write scheme for a page flash device
US6021069A (en) * 1998-09-24 2000-02-01 Macronix International Co., Ltd. Bit latch scheme for parallel program verify in floating gate memory device
FR2799043B1 (fr) * 1999-09-29 2001-12-14 St Microelectronics Sa Registre de colonnes, memoire l'incorporant, et procede d'ecriture dans une telle memoire

Also Published As

Publication number Publication date
US20020031015A1 (en) 2002-03-14
US6307792B1 (en) 2001-10-23
EP1089290A1 (de) 2001-04-04
FR2799043A1 (fr) 2001-03-30
US6385096B1 (en) 2002-05-07
FR2799043B1 (fr) 2001-12-14
EP1089290B1 (de) 2009-12-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition