DE60026908D1 - Arbitrierungsverfahren und Schaltungsarchitektur dazu - Google Patents

Arbitrierungsverfahren und Schaltungsarchitektur dazu

Info

Publication number
DE60026908D1
DE60026908D1 DE60026908T DE60026908T DE60026908D1 DE 60026908 D1 DE60026908 D1 DE 60026908D1 DE 60026908 T DE60026908 T DE 60026908T DE 60026908 T DE60026908 T DE 60026908T DE 60026908 D1 DE60026908 D1 DE 60026908D1
Authority
DE
Germany
Prior art keywords
circuit architecture
arbitration method
arbitration
architecture
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60026908T
Other languages
English (en)
Inventor
Alberto Scandurra
Salvatore Pisasale
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE60026908D1 publication Critical patent/DE60026908D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
DE60026908T 2000-07-05 2000-07-05 Arbitrierungsverfahren und Schaltungsarchitektur dazu Expired - Lifetime DE60026908D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP00114384A EP1170669B1 (de) 2000-07-05 2000-07-05 Arbitrierungsverfahren und Schaltungsarchitektur dazu

Publications (1)

Publication Number Publication Date
DE60026908D1 true DE60026908D1 (de) 2006-05-18

Family

ID=8169163

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60026908T Expired - Lifetime DE60026908D1 (de) 2000-07-05 2000-07-05 Arbitrierungsverfahren und Schaltungsarchitektur dazu

Country Status (3)

Country Link
US (1) US6704821B2 (de)
EP (1) EP1170669B1 (de)
DE (1) DE60026908D1 (de)

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KR100487542B1 (ko) * 2000-07-29 2005-05-03 엘지전자 주식회사 글로벌 버스의 버스 사용권 예약 중재방법
US7783787B1 (en) * 2002-06-13 2010-08-24 Netapp, Inc. System and method for reprioritizing high-latency input/output operations
JP2004126873A (ja) * 2002-10-01 2004-04-22 Sony Corp 情報処理装置および方法、記録媒体、並びにプログラム
KR100455396B1 (ko) * 2002-10-14 2004-11-06 삼성전자주식회사 마스터 블록들의 우선 순위를 결정하는 파라미터 발생회로 및 파라미터 발생 방법.
JP4266619B2 (ja) * 2002-11-25 2009-05-20 株式会社ルネサステクノロジ 調停回路
US7062582B1 (en) * 2003-03-14 2006-06-13 Marvell International Ltd. Method and apparatus for bus arbitration dynamic priority based on waiting period
DE10313409A1 (de) * 2003-03-25 2004-11-18 Continental Teves Ag & Co. Ohg Verfahren zum Vermeiden von fehlerhaften Aktuatorzugriffen in einem multifunktionalen elektronischen Gesamtregelungssystem
US20050050253A1 (en) * 2003-08-25 2005-03-03 Srikanth Rengarajan Programmable bus arbitration
DE102004013635B4 (de) * 2004-03-19 2006-04-20 Infineon Technologies Ag Verfahren zur Vergabe von Buszugriffsrechten in Multimaster-Bussystemen, sowie Multimaster-Bussystem zur Durchführung des Verfahrens
US20080034140A1 (en) * 2004-06-16 2008-02-07 Koji Kai Bus Arbitrating Device and Bus Arbitrating Method
US7287111B2 (en) * 2004-09-23 2007-10-23 International Business Machines Corporation Method and system for creating and dynamically selecting an arbiter design in a data processing system
JP2006172256A (ja) * 2004-12-17 2006-06-29 Renesas Technology Corp 情報処理装置
US7263566B2 (en) 2004-12-30 2007-08-28 Qualcomm Incorporated Method and apparatus of reducing transfer latency in an SOC interconnect
US7467245B2 (en) * 2005-07-22 2008-12-16 Cisco Technology, Inc. PCI arbiter
JP2007241918A (ja) * 2006-03-13 2007-09-20 Fujitsu Ltd プロセッサ装置
TW200736920A (en) * 2006-03-16 2007-10-01 Realtek Semiconductor Corp Arbiter and arbitrating method
TWI318355B (en) * 2006-04-17 2009-12-11 Realtek Semiconductor Corp System and method for bandwidth sharing in busses
GB2447688B (en) 2007-03-22 2011-05-18 Advanced Risc Mach Ltd A data processing apparatus and method for arbitrating between messages routed over a communication channel
JP2009025866A (ja) * 2007-07-17 2009-02-05 Nec Electronics Corp メモリコントローラ、バスシステム、集積回路、及び、集積回路の制御方法。
US7734854B2 (en) * 2008-01-04 2010-06-08 International Business Machines Corporation Device, system, and method of handling transactions
US8032678B2 (en) * 2008-11-05 2011-10-04 Mediatek Inc. Shared resource arbitration
WO2010052679A1 (en) * 2008-11-10 2010-05-14 Nxp B.V. Resource controlling
WO2010105060A1 (en) 2009-03-11 2010-09-16 Virage Logic Corp. Systems and methods for resource controlling
US20100325327A1 (en) * 2009-06-17 2010-12-23 Freescale Semiconductor, Inc. Programmable arbitration device and method therefor
US8984198B2 (en) * 2009-07-21 2015-03-17 Microchip Technology Incorporated Data space arbiter
US20120290810A1 (en) * 2011-04-18 2012-11-15 Jean-Jacques Lecler Memory Access Latency Metering
US9507737B2 (en) * 2012-09-19 2016-11-29 Arm Limited Arbitration circuitry and method
US10510396B1 (en) 2018-06-19 2019-12-17 Apple Inc. Method and apparatus for interrupting memory bank refresh
US10872652B2 (en) 2018-06-19 2020-12-22 Apple Inc. Method and apparatus for optimizing calibrations of a memory subsystem
US10437758B1 (en) 2018-06-29 2019-10-08 Apple Inc. Memory request management system
US10621115B2 (en) 2018-06-29 2020-04-14 Apple Inc System and method for communication link management in a credit-based system
US11100013B2 (en) 2018-08-08 2021-08-24 Apple Inc. Scheduling of read and write memory access requests
US10545701B1 (en) 2018-08-17 2020-01-28 Apple Inc. Memory arbitration techniques based on latency tolerance
US10678478B2 (en) 2018-08-24 2020-06-09 Apple Inc. Ordering memory requests based on access efficiency
US10817219B2 (en) 2018-09-12 2020-10-27 Apple Inc. Memory access scheduling using a linked list
US10838884B1 (en) 2018-09-12 2020-11-17 Apple Inc. Memory access quality-of-service reallocation
US10901617B2 (en) 2018-09-12 2021-01-26 Apple Inc. Memory access scheduling using category arbitration
US11226752B2 (en) 2019-03-05 2022-01-18 Apple Inc. Filtering memory calibration
JP7508962B2 (ja) * 2020-09-15 2024-07-02 富士通株式会社 半導体装置及び転送方法
US11288216B1 (en) * 2020-09-30 2022-03-29 Dell Products L.P. Priority reversing data traffic for latency sensitive peripherals

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4663620A (en) * 1985-09-05 1987-05-05 International Business Machines Corporation Modified crossbar switch operation with fixed priority conflict resolution and apparatus for performing same
US5241632A (en) * 1992-01-30 1993-08-31 Digital Equipment Corporation Programmable priority arbiter
US5392033A (en) * 1993-01-05 1995-02-21 International Business Machines Corporation Priority generator for providing controllable guaranteed fairness in accessing a shared bus
US5546548A (en) * 1993-03-31 1996-08-13 Intel Corporation Arbiter and arbitration process for a dynamic and flexible prioritization
CA2115731C (en) * 1993-05-17 2000-01-25 Mikiel Loyal Larson Dynamically programmable bus arbiter with provisions for historical feedback and error detection and correction
US5956493A (en) 1996-03-08 1999-09-21 Advanced Micro Devices, Inc. Bus arbiter including programmable request latency counters for varying arbitration priority
US5931931A (en) * 1997-04-04 1999-08-03 International Business Machines Corporation Method for bus arbitration in a multiprocessor system
US5884051A (en) * 1997-06-13 1999-03-16 International Business Machines Corporation System, methods and computer program products for flexibly controlling bus access based on fixed and dynamic priorities
US6266718B1 (en) * 1998-10-14 2001-07-24 Micron Technology, Inc. Apparatus for controlling data transfer operations between a memory and devices having respective latencies

Also Published As

Publication number Publication date
EP1170669B1 (de) 2006-03-29
US6704821B2 (en) 2004-03-09
EP1170669A1 (de) 2002-01-09
US20020069310A1 (en) 2002-06-06

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