DE3851514T2 - Verfahren und Vorrichtung zur überprüfung der Zustände einer Maschine. - Google Patents

Verfahren und Vorrichtung zur überprüfung der Zustände einer Maschine.

Info

Publication number
DE3851514T2
DE3851514T2 DE3851514T DE3851514T DE3851514T2 DE 3851514 T2 DE3851514 T2 DE 3851514T2 DE 3851514 T DE3851514 T DE 3851514T DE 3851514 T DE3851514 T DE 3851514T DE 3851514 T2 DE3851514 T2 DE 3851514T2
Authority
DE
Germany
Prior art keywords
checking
conditions
machine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3851514T
Other languages
English (en)
Other versions
DE3851514D1 (de
Inventor
Martin W Sanner
Seema Chandra
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tandem Computers Inc
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Publication of DE3851514D1 publication Critical patent/DE3851514D1/de
Application granted granted Critical
Publication of DE3851514T2 publication Critical patent/DE3851514T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing
DE3851514T 1987-11-30 1988-11-21 Verfahren und Vorrichtung zur überprüfung der Zustände einer Maschine. Expired - Fee Related DE3851514T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/126,525 US4845712A (en) 1987-11-30 1987-11-30 State machine checker

Publications (2)

Publication Number Publication Date
DE3851514D1 DE3851514D1 (de) 1994-10-20
DE3851514T2 true DE3851514T2 (de) 1995-02-09

Family

ID=22425291

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3851514T Expired - Fee Related DE3851514T2 (de) 1987-11-30 1988-11-21 Verfahren und Vorrichtung zur überprüfung der Zustände einer Maschine.

Country Status (6)

Country Link
US (1) US4845712A (de)
EP (1) EP0319185B1 (de)
JP (1) JPH01280843A (de)
AU (1) AU615688B2 (de)
CA (1) CA1311305C (de)
DE (1) DE3851514T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5426767A (en) * 1987-08-03 1995-06-20 Compaq Computer Corporation Method for distinguishing between a 286-type central processing unit and a 386-type central processing unit
US5640585A (en) * 1988-02-09 1997-06-17 Ast Research, Inc. State machine bus controller
US5063536A (en) * 1988-03-11 1991-11-05 Washington State University Research Foundation, Inc. Microprogrammable asynchronous controllers for digital electronic systems
GB9021859D0 (en) * 1990-10-08 1990-11-21 D2B Systems Co Ltd Test apparatus and method
IT1246467B (it) * 1990-10-22 1994-11-19 St Microelectronics Srl Macchina a stati finiti per sistemi affidabili di computazione e regolazione
US5546561A (en) * 1991-02-11 1996-08-13 Intel Corporation Circuitry and method for selectively protecting the integrity of data stored within a range of addresses within a non-volatile semiconductor memory
US5369647A (en) * 1991-12-16 1994-11-29 Intel Corporation Circuitry and method for testing a write state machine
JP3424262B2 (ja) * 1993-04-21 2003-07-07 ヤマハ株式会社 オンライン型カラオケシステム
US6756965B2 (en) 1994-03-18 2004-06-29 International Business Machines Corporation Input device having two joysticks and touchpad with default template
US5909369A (en) * 1996-07-24 1999-06-01 Network Machines, Inc. Coordinating the states of a distributed finite state machine
US5805793A (en) * 1996-10-18 1998-09-08 Mcdonnell Douglas Corporation Stand-alone test device for testing command-response remote terminals
US6120298A (en) * 1998-01-23 2000-09-19 Scientific Learning Corp. Uniform motivation for multiple computer-assisted training systems
US6293801B1 (en) 1998-01-23 2001-09-25 Scientific Learning Corp. Adaptive motivation for computer-assisted training system
US6067638A (en) * 1998-04-22 2000-05-23 Scientific Learning Corp. Simulated play of interactive multimedia applications for error detection
US6113645A (en) * 1998-04-22 2000-09-05 Scientific Learning Corp. Simulated play of interactive multimedia applications for error detection
US7065481B2 (en) 1999-11-30 2006-06-20 Synplicity, Inc. Method and system for debugging an electronic system using instrumentation circuitry and a logic analyzer
US7356786B2 (en) * 1999-11-30 2008-04-08 Synplicity, Inc. Method and user interface for debugging an electronic system
US6823497B2 (en) 1999-11-30 2004-11-23 Synplicity, Inc. Method and user interface for debugging an electronic system
US6931572B1 (en) 1999-11-30 2005-08-16 Synplicity, Inc. Design instrumentation circuitry
US7072818B1 (en) 1999-11-30 2006-07-04 Synplicity, Inc. Method and system for debugging an electronic system
US6581191B1 (en) 1999-11-30 2003-06-17 Synplicity, Inc. Hardware debugging in a hardware description language
US7222315B2 (en) * 2000-11-28 2007-05-22 Synplicity, Inc. Hardware-based HDL code coverage and design analysis
JP4451712B2 (ja) * 2004-05-18 2010-04-14 富士通マイクロエレクトロニクス株式会社 データ転送装置、および転送異常状態検出方法。
US10601642B2 (en) 2015-05-28 2020-03-24 Cisco Technology, Inc. Virtual network health checker

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3457550A (en) * 1967-07-11 1969-07-22 Bell Telephone Labor Inc Automatic handshaking method and apparatus for data transmission systems
US4055801A (en) * 1970-08-18 1977-10-25 Pike Harold L Automatic electronic test equipment and method
DE2121330C3 (de) * 1971-04-30 1974-10-17 Ludwig 6369 Dortelweil Illian Verfahren und Schaltungsanordnung zum Prüfen digital arbeitender elektronischer Geräte und ihrer Bauteile
JPS5426345B2 (de) * 1973-11-16 1979-09-03
US4071704A (en) * 1977-01-26 1978-01-31 Trw, Inc. Service generator checking apparatus
US4125763A (en) * 1977-07-15 1978-11-14 Fluke Trendar Corporation Automatic tester for microprocessor board
US4122995A (en) * 1977-08-02 1978-10-31 Burroughs Corporation Asynchronous digital circuit testing system
US4176780A (en) * 1977-12-06 1979-12-04 Ncr Corporation Method and apparatus for testing printed circuit boards
US4161276A (en) * 1978-03-01 1979-07-17 Ncr Corporation Complex logical fault detection apparatus and method
US4317200A (en) * 1978-10-20 1982-02-23 Vlsi Technology Research Association Method and device for testing a sequential circuit divided into a plurality of partitions
FR2466144B1 (fr) * 1979-09-18 1986-11-07 Lignes Telegraph Telephon Procede de test d'une ligne de transmission de donnees numeriques entre deux modems et dispositif mettant en oeuvre ce procede
US4556976A (en) * 1982-08-14 1985-12-03 International Computers Limited Checking sequential logic circuits
GB2125591B (en) * 1982-08-14 1986-01-22 Int Computers Ltd Checking sequent logic circuits
JPS61165159A (ja) * 1984-12-19 1986-07-25 Fujitsu Ltd 遷移状態チエツク回路
US4674089A (en) * 1985-04-16 1987-06-16 Intel Corporation In-circuit emulator
US4718064A (en) * 1986-02-28 1988-01-05 Western Digital Corporation Automatic test system

Also Published As

Publication number Publication date
AU2519488A (en) 1989-06-01
JPH01280843A (ja) 1989-11-13
EP0319185A2 (de) 1989-06-07
CA1311305C (en) 1992-12-08
DE3851514D1 (de) 1994-10-20
US4845712A (en) 1989-07-04
EP0319185B1 (de) 1994-09-14
EP0319185A3 (en) 1990-11-28
AU615688B2 (en) 1991-10-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee