DE3751108D1 - Mikroprozessor mit der Fähigkeit, an einen Koprozessor geschaltet zu werden. - Google Patents

Mikroprozessor mit der Fähigkeit, an einen Koprozessor geschaltet zu werden.

Info

Publication number
DE3751108D1
DE3751108D1 DE3751108T DE3751108T DE3751108D1 DE 3751108 D1 DE3751108 D1 DE 3751108D1 DE 3751108 T DE3751108 T DE 3751108T DE 3751108 T DE3751108 T DE 3751108T DE 3751108 D1 DE3751108 D1 DE 3751108D1
Authority
DE
Germany
Prior art keywords
coprocessor
microprocessor
ability
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3751108T
Other languages
English (en)
Other versions
DE3751108T2 (de
Inventor
Takashi C O Nec Corpo Nakayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP27014386A external-priority patent/JPH0677251B2/ja
Priority claimed from JP1494587A external-priority patent/JPH0650500B2/ja
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3751108D1 publication Critical patent/DE3751108D1/de
Publication of DE3751108T2 publication Critical patent/DE3751108T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
DE3751108T 1986-11-12 1987-11-12 Mikroprozessor mit der Fähigkeit, an einen Koprozessor geschaltet zu werden. Expired - Fee Related DE3751108T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP27014386A JPH0677251B2 (ja) 1986-11-12 1986-11-12 スレ−ブ・プロセツサの制御方式
JP1494587A JPH0650500B2 (ja) 1987-01-25 1987-01-25 スレ−ブ・プロセツサ制御方式

Publications (2)

Publication Number Publication Date
DE3751108D1 true DE3751108D1 (de) 1995-04-06
DE3751108T2 DE3751108T2 (de) 1995-10-26

Family

ID=26350995

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3751108T Expired - Fee Related DE3751108T2 (de) 1986-11-12 1987-11-12 Mikroprozessor mit der Fähigkeit, an einen Koprozessor geschaltet zu werden.

Country Status (3)

Country Link
US (1) US4926318A (de)
EP (1) EP0267613B1 (de)
DE (1) DE3751108T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63261449A (ja) * 1987-04-20 1988-10-28 Hitachi Ltd デ−タ処理装置
JPH0786870B2 (ja) * 1988-04-15 1995-09-20 株式会社日立製作所 コプロセツサのデータ転送制御方法およびその回路
JP2754825B2 (ja) * 1989-02-03 1998-05-20 日本電気株式会社 マイクロプロセッサ
US5068821A (en) * 1989-03-27 1991-11-26 Ge Fanuc Automation North America, Inc. Bit processor with powers flow register switches control a function block processor for execution of the current command
US5590363A (en) * 1989-04-18 1996-12-31 Dell Usa, L.P. Circuit for detection of co-processor unit presence and for correction of its absence
US5134713A (en) * 1989-05-19 1992-07-28 Compaq Computer Corporation Coprocessor detection circuit
US5420989A (en) * 1991-06-12 1995-05-30 Cyrix Corporation Coprocessor interface supporting I/O or memory mapped communications
JP2884831B2 (ja) * 1991-07-03 1999-04-19 株式会社日立製作所 処理装置
JPH0628322A (ja) * 1992-07-10 1994-02-04 Canon Inc 情報処理装置
US5490279A (en) * 1993-05-21 1996-02-06 Intel Corporation Method and apparatus for operating a single CPU computer system as a multiprocessor system
US5884091A (en) * 1993-12-08 1999-03-16 Intel Corporation Computer system having a central processing unit responsive to the identity of an upgrade processor
JPH07219774A (ja) * 1994-02-07 1995-08-18 Fujitsu Ltd データ処理装置および例外処理方法
CA2137488C (en) * 1994-02-18 1998-09-29 Richard I. Baum Coexecuting method and means for performing parallel processing in conventional types of data processing systems
DE69535409T2 (de) * 1994-06-29 2007-11-08 Intel Corp., Santa Clara Prozessor, das das systembusrecht in einem erweiterbaren multiprozessor-rechnersystem anzeigt
US5892934A (en) * 1996-04-02 1999-04-06 Advanced Micro Devices, Inc. Microprocessor configured to detect a branch to a DSP routine and to direct a DSP to execute said routine
JP3708853B2 (ja) * 2001-09-03 2005-10-19 松下電器産業株式会社 マルチプロセッサシステムおよびプログラム制御方法
JP3878508B2 (ja) * 2001-11-08 2007-02-07 松下電器産業株式会社 回路群制御システム
JP4644569B2 (ja) * 2005-09-02 2011-03-02 富士通セミコンダクター株式会社 複数チップの起動方法
US11138140B2 (en) * 2020-01-31 2021-10-05 Hewlett Packard Enterprise Development Lp Configuring first subsystem with a master processor and a second subsystem with a slave processor

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3713107A (en) * 1972-04-03 1973-01-23 Ncr Firmware sort processor system
US4014005A (en) * 1976-01-05 1977-03-22 International Business Machines Corporation Configuration and control unit for a heterogeneous multi-system
JPS6038740B2 (ja) * 1976-04-19 1985-09-03 株式会社東芝 デ−タ処理装置
US4128876A (en) * 1977-04-28 1978-12-05 International Business Machines Corporation Synchronous microcode generated interface for system of microcoded data processors
US4395758A (en) * 1979-12-10 1983-07-26 Digital Equipment Corporation Accelerator processor for a data processing system
US4547849A (en) * 1981-12-09 1985-10-15 Glenn Louie Interface between a microprocessor and a coprocessor
JPS58140862A (ja) * 1982-02-16 1983-08-20 Toshiba Corp 相互排他方式
US4509116A (en) * 1982-04-21 1985-04-02 Digital Equipment Corporation Special instruction processing unit for data processing system
US4679166A (en) * 1983-01-17 1987-07-07 Tandy Corporation Co-processor combination
US4715013A (en) * 1983-04-18 1987-12-22 Motorola, Inc. Coprocessor instruction format

Also Published As

Publication number Publication date
DE3751108T2 (de) 1995-10-26
EP0267613A3 (en) 1990-04-04
EP0267613B1 (de) 1995-03-01
EP0267613A2 (de) 1988-05-18
US4926318A (en) 1990-05-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee