DE3688024D1 - Speicheranordnung. - Google Patents

Speicheranordnung.

Info

Publication number
DE3688024D1
DE3688024D1 DE8686110494T DE3688024T DE3688024D1 DE 3688024 D1 DE3688024 D1 DE 3688024D1 DE 8686110494 T DE8686110494 T DE 8686110494T DE 3688024 T DE3688024 T DE 3688024T DE 3688024 D1 DE3688024 D1 DE 3688024D1
Authority
DE
Germany
Prior art keywords
storage arrangement
arrangement
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686110494T
Other languages
English (en)
Other versions
DE3688024T2 (de
Inventor
Masahiko Sumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3688024D1 publication Critical patent/DE3688024D1/de
Publication of DE3688024T2 publication Critical patent/DE3688024T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
    • G06F7/785—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using a RAM
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/16—Multiplexed systems, i.e. using two or more similar devices which are alternately accessed for enqueue and dequeue operations, e.g. ping-pong buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Shift Register Type Memory (AREA)
DE19863688024 1985-07-30 1986-07-30 Speicheranordnung. Expired - Fee Related DE3688024T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60168027A JPS6228993A (ja) 1985-07-30 1985-07-30 記憶装置

Publications (2)

Publication Number Publication Date
DE3688024D1 true DE3688024D1 (de) 1993-04-22
DE3688024T2 DE3688024T2 (de) 1993-09-09

Family

ID=15860457

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19863650508 Expired - Fee Related DE3650508T2 (de) 1985-07-30 1986-07-30 Speicheranordnung zur Simulation eines Schieberegisters
DE19863688024 Expired - Fee Related DE3688024T2 (de) 1985-07-30 1986-07-30 Speicheranordnung.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE19863650508 Expired - Fee Related DE3650508T2 (de) 1985-07-30 1986-07-30 Speicheranordnung zur Simulation eines Schieberegisters

Country Status (3)

Country Link
EP (2) EP0463640B1 (de)
JP (1) JPS6228993A (de)
DE (2) DE3650508T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63226777A (ja) * 1987-03-16 1988-09-21 Oki Electric Ind Co Ltd 画像デ−タ読取方式
US4899307A (en) * 1987-04-10 1990-02-06 Tandem Computers Incorporated Stack with unary encoded stack pointer
NL8702672A (nl) * 1987-11-09 1989-06-01 Philips Nv Serieel geheugen, alsmede beeldgeheugeninrichting en weergeeftoestel voorzien van een of meer seriele geheugens.
JPH0546808A (ja) * 1991-08-12 1993-02-26 Hitachi Electron Eng Co Ltd Ｏｃｒの画像信号処理回路
KR950011967B1 (ko) * 1992-07-31 1995-10-12 임홍식 반도체 녹음기용 메모리 정리 장치
FR2699707B1 (fr) * 1992-12-23 1995-01-27 Bull Sa Système informatique à haut débit, composant de mémoire et contrôleur de mémoire en résultant.
US5526316A (en) * 1994-04-29 1996-06-11 Winbond Electronics Corp. Serial access memory device
CA2287034A1 (en) * 1998-12-03 2000-06-03 Lucent Technologies, Inc. A memory operated in a modified ping-pong mode
CN1138361C (zh) * 1999-01-12 2004-02-11 索尼公司 信息发送装置及其方法
GB0025495D0 (en) * 2000-10-17 2000-11-29 Digital Interfaces Ltd A data buffer
US6874043B2 (en) 2000-10-17 2005-03-29 Bridgeworks Ltd. Data buffer

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810299B2 (ja) * 1977-10-26 1983-02-25 積水化成品工業株式会社 発泡シ−ト製の容器
JPS5671105A (en) * 1979-11-13 1981-06-13 Yaskawa Electric Mfg Co Ltd Shift register type programmable controller with memory
JPS5694589A (en) * 1979-12-27 1981-07-31 Nec Corp Memory device
JPS57147183A (en) * 1981-03-05 1982-09-10 Fujitsu Ltd Shift register
US4509142A (en) * 1982-12-15 1985-04-02 Texas Instruments Incorporated Semiconductor memory device with pipeline access
US4608678A (en) * 1983-12-23 1986-08-26 Advanced Micro Devices, Inc. Semiconductor memory device for serial scan applications
FR2561429B1 (fr) * 1984-03-13 1986-09-19 Trt Telecom Radio Electr Dispositif d'adressage pour fournir a une memoire des codes d'adresse

Also Published As

Publication number Publication date
EP0463640A3 (en) 1992-08-05
EP0463640B1 (de) 1996-04-03
JPS6228993A (ja) 1987-02-06
EP0211385B1 (de) 1993-03-17
DE3688024T2 (de) 1993-09-09
EP0211385A3 (en) 1990-01-24
EP0211385A2 (de) 1987-02-25
DE3650508T2 (de) 1996-09-12
DE3650508D1 (de) 1996-05-09
EP0463640A2 (de) 1992-01-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee