DE3686017D1 - Anisotroper gleichrichter und verfahren zu seiner herstellung. - Google Patents

Anisotroper gleichrichter und verfahren zu seiner herstellung.

Info

Publication number
DE3686017D1
DE3686017D1 DE8686870141T DE3686017T DE3686017D1 DE 3686017 D1 DE3686017 D1 DE 3686017D1 DE 8686870141 T DE8686870141 T DE 8686870141T DE 3686017 T DE3686017 T DE 3686017T DE 3686017 D1 DE3686017 D1 DE 3686017D1
Authority
DE
Germany
Prior art keywords
anisotropical
rectifier
producing
same
anisotropical rectifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686870141T
Other languages
English (en)
Other versions
DE3686017T2 (de
Inventor
Muni M Mitchell
Willem G Einthoven
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Semiconductor Inc
Original Assignee
Arris Technology Inc
General Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Arris Technology Inc, General Instrument Corp filed Critical Arris Technology Inc
Publication of DE3686017D1 publication Critical patent/DE3686017D1/de
Application granted granted Critical
Publication of DE3686017T2 publication Critical patent/DE3686017T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H01L29/66136—PN junction diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0661—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/8613—Mesa PN junction diodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/965—Shaped junction formation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thyristors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
DE8686870141T 1985-10-04 1986-10-02 Anisotroper gleichrichter und verfahren zu seiner herstellung. Expired - Lifetime DE3686017T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/784,451 US4740477A (en) 1985-10-04 1985-10-04 Method for fabricating a rectifying P-N junction having improved breakdown voltage characteristics

Publications (2)

Publication Number Publication Date
DE3686017D1 true DE3686017D1 (de) 1992-08-20
DE3686017T2 DE3686017T2 (de) 1993-03-04

Family

ID=25132485

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686870141T Expired - Lifetime DE3686017T2 (de) 1985-10-04 1986-10-02 Anisotroper gleichrichter und verfahren zu seiner herstellung.

Country Status (5)

Country Link
US (3) US4740477A (de)
EP (1) EP0217780B1 (de)
JP (2) JP2688747B2 (de)
KR (1) KR900008146B1 (de)
DE (1) DE3686017T2 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
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US4740477A (en) * 1985-10-04 1988-04-26 General Instrument Corporation Method for fabricating a rectifying P-N junction having improved breakdown voltage characteristics
EP0310836A3 (de) * 1987-10-08 1989-06-14 Siemens Aktiengesellschaft Halbleiterbauelement mit einem planaren pn-Übergang
US4904610A (en) * 1988-01-27 1990-02-27 General Instrument Corporation Wafer level process for fabricating passivated semiconductor devices
US5166769A (en) * 1988-07-18 1992-11-24 General Instrument Corporation Passitvated mesa semiconductor and method for making same
US4980315A (en) * 1988-07-18 1990-12-25 General Instrument Corporation Method of making a passivated P-N junction in mesa semiconductor structure
DE3841149A1 (de) * 1988-12-07 1990-06-13 Asea Brown Boveri Verfahren zur herstellung einer leistungshalbleiterdiode
US5079176A (en) * 1990-03-26 1992-01-07 Harris Corporation Method of forming a high voltage junction in a dielectrically isolated island
US5150176A (en) * 1992-02-13 1992-09-22 Motorola, Inc. PN junction surge suppressor structure with moat
US5268310A (en) * 1992-11-25 1993-12-07 M/A-Com, Inc. Method for making a mesa type PIN diode
EP0671770B1 (de) * 1993-02-09 2000-08-02 GENERAL SEMICONDUCTOR, Inc. Mehrschichtige Epitaxie für eine Siliziumdiode
US5399901A (en) * 1994-04-20 1995-03-21 General Instrument Corp. Semiconductor devices having a mesa structure and method of fabrication for improved surface voltage breakdown characteristics
DE69529490T2 (de) * 1994-04-20 2003-08-14 Gen Semiconductor Inc Halbleiteranordnung mit Mesastruktur
FR2719416B1 (fr) * 1994-04-29 1996-07-05 Thomson Lcd Procédé de passivation des flancs d'un composant semiconducteur à couches minces.
DE19538853A1 (de) * 1995-10-19 1997-04-24 Bosch Gmbh Robert Halbleiteranordnung und Verfahren zur Herstellung einer Halbleiteranordnung
US5640043A (en) * 1995-12-20 1997-06-17 General Instrument Corporation Of Delaware High voltage silicon diode with optimum placement of silicon-germanium layers
US6013358A (en) * 1997-11-18 2000-01-11 Cooper Industries, Inc. Transient voltage protection device with ceramic substrate
US5930660A (en) * 1997-10-17 1999-07-27 General Semiconductor, Inc. Method for fabricating diode with improved reverse energy characteristics
US5882986A (en) * 1998-03-30 1999-03-16 General Semiconductor, Inc. Semiconductor chips having a mesa structure provided by sawing
US20020163059A1 (en) * 2000-02-17 2002-11-07 Hamerski Roman J. Device with epitaxial base
SE0002179D0 (sv) * 2000-06-13 2000-06-13 Abb Research Ltd A method for producing a pn-junction
US20040075160A1 (en) * 2002-10-18 2004-04-22 Jack Eng Transient voltage suppressor having an epitaxial layer for higher avalanche voltage operation
US20050194584A1 (en) * 2003-11-12 2005-09-08 Slater David B.Jr. LED fabrication via ion implant isolation
US7592634B2 (en) * 2004-05-06 2009-09-22 Cree, Inc. LED fabrication via ion implant isolation
US20070077738A1 (en) * 2005-10-03 2007-04-05 Aram Tanielian Fabrication of small scale matched bi-polar TVS devices having reduced parasitic losses
JP5213350B2 (ja) * 2007-04-26 2013-06-19 関西電力株式会社 炭化珪素ツェナーダイオード
DE102018113573B4 (de) * 2018-06-07 2022-11-03 Semikron Elektronik Gmbh & Co. Kg Patentabteilung Diode mit einem Halbleiterkörper
JP7331672B2 (ja) * 2019-12-09 2023-08-23 富士通株式会社 半導体デバイス、これを用いた無線受信器、及び半導体デバイスの製造方法

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NL246742A (de) * 1958-12-24
US3089794A (en) * 1959-06-30 1963-05-14 Ibm Fabrication of pn junctions by deposition followed by diffusion
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US3333326A (en) * 1964-06-29 1967-08-01 Ibm Method of modifying electrical characteristic of semiconductor member
US3370209A (en) * 1964-08-31 1968-02-20 Gen Electric Power bulk breakdown semiconductor devices
US3413527A (en) * 1964-10-02 1968-11-26 Gen Electric Conductive electrode for reducing the electric field in the region of the junction of a junction semiconductor device
US3491434A (en) * 1965-01-28 1970-01-27 Texas Instruments Inc Junction isolation diffusion
US3378915A (en) * 1966-03-31 1968-04-23 Northern Electric Co Method of making a planar diffused semiconductor voltage reference diode
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US3432919A (en) * 1966-10-31 1969-03-18 Raytheon Co Method of making semiconductor diodes
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US3689993A (en) * 1971-07-26 1972-09-12 Texas Instruments Inc Fabrication of semiconductor devices having low thermal inpedance bonds to heat sinks
JPS4826430A (de) * 1971-08-11 1973-04-07
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US3767485A (en) * 1971-12-29 1973-10-23 A Sahagun Method for producing improved pn junction
US3832246A (en) * 1972-05-22 1974-08-27 Bell Telephone Labor Inc Methods for making avalanche diodes
US3849789A (en) * 1972-11-01 1974-11-19 Gen Electric Schottky barrier diodes
DE2324780C3 (de) * 1973-05-16 1978-07-27 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen eines Halbleiterbauelements
JPS50110571A (de) * 1974-02-07 1975-08-30
US3895429A (en) * 1974-05-09 1975-07-22 Rca Corp Method of making a semiconductor device
US3954524A (en) * 1974-07-26 1976-05-04 Texas Instruments Incorporated Self-aligning photoresist process for selectively opening tops of mesas in mesa-diode-array structures
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US4064620A (en) * 1976-01-27 1977-12-27 Hughes Aircraft Company Ion implantation process for fabricating high frequency avalanche devices
JPS5313366A (en) * 1976-07-22 1978-02-06 Fujitsu Ltd Manufacture of mesa-type semiconductor device
US4047196A (en) * 1976-08-24 1977-09-06 Rca Corporation High voltage semiconductor device having a novel edge contour
DE2755168A1 (de) * 1977-12-10 1979-06-13 Itt Ind Gmbh Deutsche Verfahren zur herstellung von halbleiterbauelementen
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US4373255A (en) * 1979-06-19 1983-02-15 The United States Of America As Represented By The Secretary Of The Air Force Method of making oxide passivated mesa epitaxial diodes with integral plated heat sink
JPS57166078A (en) * 1981-04-06 1982-10-13 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
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JPS60186071A (ja) * 1984-03-05 1985-09-21 Nec Corp 半導体装置の製造方法
US4740477A (en) * 1985-10-04 1988-04-26 General Instrument Corporation Method for fabricating a rectifying P-N junction having improved breakdown voltage characteristics

Also Published As

Publication number Publication date
JPH1041314A (ja) 1998-02-13
US5010023A (en) 1991-04-23
US4891685A (en) 1990-01-02
JP2688747B2 (ja) 1997-12-10
US4740477A (en) 1988-04-26
EP0217780A3 (en) 1989-03-29
JP3073706B2 (ja) 2000-08-07
KR870004522A (ko) 1987-05-11
KR900008146B1 (ko) 1990-11-03
EP0217780A2 (de) 1987-04-08
JPS62118583A (ja) 1987-05-29
EP0217780B1 (de) 1992-07-15
DE3686017T2 (de) 1993-03-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: GENERAL SEMICONDUCTOR, INC., MELVILLE, N.Y., US