DE3681994D1 - Verfahren unter verwendung eines trockenaetzers zum vermeiden eines maskierungs- und aetzzyklus. - Google Patents

Verfahren unter verwendung eines trockenaetzers zum vermeiden eines maskierungs- und aetzzyklus.

Info

Publication number
DE3681994D1
DE3681994D1 DE8686109712T DE3681994T DE3681994D1 DE 3681994 D1 DE3681994 D1 DE 3681994D1 DE 8686109712 T DE8686109712 T DE 8686109712T DE 3681994 T DE3681994 T DE 3681994T DE 3681994 D1 DE3681994 D1 DE 3681994D1
Authority
DE
Germany
Prior art keywords
masking
avoid
etching cycle
dry cutter
cutter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686109712T
Other languages
English (en)
Inventor
Paul Edward Nixon
Murty Suryanarayana Polavarapu
David Stanasolovich
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3681994D1 publication Critical patent/DE3681994D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C15/00—Surface treatment of glass, not in the form of fibres or filaments, by etching

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Inorganic Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)
DE8686109712T 1985-08-09 1986-07-15 Verfahren unter verwendung eines trockenaetzers zum vermeiden eines maskierungs- und aetzzyklus. Expired - Fee Related DE3681994D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/764,148 US4624739A (en) 1985-08-09 1985-08-09 Process using dry etchant to avoid mask-and-etch cycle

Publications (1)

Publication Number Publication Date
DE3681994D1 true DE3681994D1 (de) 1991-11-21

Family

ID=25069822

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686109712T Expired - Fee Related DE3681994D1 (de) 1985-08-09 1986-07-15 Verfahren unter verwendung eines trockenaetzers zum vermeiden eines maskierungs- und aetzzyklus.

Country Status (4)

Country Link
US (1) US4624739A (de)
EP (1) EP0212251B1 (de)
JP (1) JPS6237936A (de)
DE (1) DE3681994D1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2593631B1 (fr) * 1986-01-27 1989-02-17 Maurice Francois Ecran d'affichage a matrice active a resistance de grille et procedes de fabrication de cet ecran
US5010039A (en) * 1989-05-15 1991-04-23 Ku San Mei Method of forming contacts to a semiconductor device
US5086248A (en) * 1989-08-18 1992-02-04 Galileo Electro-Optics Corporation Microchannel electron multipliers
US5205902A (en) * 1989-08-18 1993-04-27 Galileo Electro-Optics Corporation Method of manufacturing microchannel electron multipliers
KR100797202B1 (ko) * 2000-06-23 2008-01-23 허니웰 인터내셔널 인코포레이티드 손상된 실리카 유전 필름에 소수성을 부여하는 방법 및 손상된 실리카 유전 필름 처리 방법
US6638438B2 (en) * 2001-10-16 2003-10-28 Ulisatera Corporation Printed circuit board micro hole processing method
WO2004068555A2 (en) * 2003-01-25 2004-08-12 Honeywell International Inc Repair and restoration of damaged dielectric materials and films
US7709371B2 (en) * 2003-01-25 2010-05-04 Honeywell International Inc. Repairing damage to low-k dielectric materials using silylating agents
US7154086B2 (en) * 2003-03-19 2006-12-26 Burle Technologies, Inc. Conductive tube for use as a reflectron lens
US8475666B2 (en) * 2004-09-15 2013-07-02 Honeywell International Inc. Method for making toughening agent materials
US7678712B2 (en) * 2005-03-22 2010-03-16 Honeywell International, Inc. Vapor phase treatment of dielectric materials
US20080073516A1 (en) * 2006-03-10 2008-03-27 Laprade Bruce N Resistive glass structures used to shape electric fields in analytical instruments

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4180432A (en) * 1977-12-19 1979-12-25 International Business Machines Corporation Process for etching SiO2 layers to silicon in a moderate vacuum gas plasma
US4253907A (en) * 1979-03-28 1981-03-03 Western Electric Company, Inc. Anisotropic plasma etching
JPS5690525A (en) * 1979-11-28 1981-07-22 Fujitsu Ltd Manufacture of semiconductor device
DE3016736A1 (de) * 1980-04-30 1981-11-05 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen geaetzter strukturen in siliziumoxidschichten
JPS5796552A (en) * 1980-12-09 1982-06-15 Nec Corp Manufacture of semiconductor device
US4457820A (en) * 1981-12-24 1984-07-03 International Business Machines Corporation Two step plasma etching
DE3216823A1 (de) * 1982-05-05 1983-11-10 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von strukturen von aus metallsilizid und polysilizium bestehenden doppelschichten auf integrierte halbleiterschaltungen enthaltenden substraten durch reaktives ionenaetzen
DE3315719A1 (de) * 1983-04-29 1984-10-31 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von strukturen von aus metallsiliziden bzw. silizid-polysilizium bestehenden doppelschichten fuer integrierte halbleiterschaltungen durch reaktives ionenaetzen
US4508815A (en) * 1983-11-03 1985-04-02 Mostek Corporation Recessed metallization
US4532002A (en) * 1984-04-10 1985-07-30 Rca Corporation Multilayer planarizing structure for lift-off technique
JPS61161721A (ja) * 1985-01-11 1986-07-22 Nec Corp 表面平坦化法

Also Published As

Publication number Publication date
EP0212251B1 (de) 1991-10-16
JPH0545057B2 (de) 1993-07-08
EP0212251A2 (de) 1987-03-04
EP0212251A3 (en) 1988-03-16
JPS6237936A (ja) 1987-02-18
US4624739A (en) 1986-11-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee