DE3587446T2 - Signalverarbeitungsprozessor und hierarchische Multiverarbeitungstruktur mit mindestens einem solchen Prozessor. - Google Patents
Signalverarbeitungsprozessor und hierarchische Multiverarbeitungstruktur mit mindestens einem solchen Prozessor.Info
- Publication number
- DE3587446T2 DE3587446T2 DE85201272T DE3587446T DE3587446T2 DE 3587446 T2 DE3587446 T2 DE 3587446T2 DE 85201272 T DE85201272 T DE 85201272T DE 3587446 T DE3587446 T DE 3587446T DE 3587446 T2 DE3587446 T2 DE 3587446T2
- Authority
- DE
- Germany
- Prior art keywords
- processor
- processing
- hierarchical multi
- signal processing
- processing structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7828—Architectures of general purpose stored program computers comprising a single central processing unit without memory
- G06F15/7832—Architectures of general purpose stored program computers comprising a single central processing unit without memory on one IC chip (single chip microprocessors)
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8412800A FR2569290B1 (fr) | 1984-08-14 | 1984-08-14 | Processeur pour le traitement de signal et structure de multitraitement hierarchisee comportant au moins un tel processeur |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3587446D1 DE3587446D1 (de) | 1993-08-19 |
DE3587446T2 true DE3587446T2 (de) | 1994-02-03 |
Family
ID=9307038
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE85201272T Expired - Fee Related DE3587446T2 (de) | 1984-08-14 | 1985-08-06 | Signalverarbeitungsprozessor und hierarchische Multiverarbeitungstruktur mit mindestens einem solchen Prozessor. |
Country Status (7)
Country | Link |
---|---|
US (1) | US4845660A (de) |
EP (1) | EP0171856B1 (de) |
JP (1) | JPH0833876B2 (de) |
AU (1) | AU4614185A (de) |
CA (1) | CA1241764A (de) |
DE (1) | DE3587446T2 (de) |
FR (1) | FR2569290B1 (de) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4849703A (en) * | 1986-07-15 | 1989-07-18 | Hayes Microcomputer Products, Inc. | Method and apparatus for generating a data sampling clock locked to a baud clock contained in a data signal |
US4910474A (en) * | 1986-07-15 | 1990-03-20 | Hayes Microcomputer Products, Inc. | Method and apparatus for generating phase and amplitude modulated signals |
US4808937A (en) * | 1986-07-15 | 1989-02-28 | Hayes Microcomputer Products, Inc. | Phase-locked loop for a modem |
US5040194A (en) * | 1986-07-15 | 1991-08-13 | Hayes Microcomputer Products, Inc. | Method and apparatus for providing for automatic gain control of incoming signals in a modem |
US4868864A (en) * | 1986-07-15 | 1989-09-19 | Hayes Microcomputer Products, Inc. | Autocorrelating 2400 bps handshake sequence detector |
US5146606A (en) * | 1986-09-18 | 1992-09-08 | Digital Equipment Corporation | Systems for interconnecting and configuring plurality of memory elements by control of mode signals |
US4985832A (en) * | 1986-09-18 | 1991-01-15 | Digital Equipment Corporation | SIMD array processing system with routing networks having plurality of switching stages to transfer messages among processors |
WO1988006764A2 (en) * | 1987-02-24 | 1988-09-07 | Digital Equipment Corporation | Massively parallel array processing system |
FR2622711A1 (fr) * | 1987-11-04 | 1989-05-05 | Trt Telecom Radio Electr | Dispositif destine a remplacer un circuit integre comportant sur la meme puce un processeur de signal et un ensemble de memoire contenant des informations figees |
US5166903A (en) * | 1988-10-25 | 1992-11-24 | International Business Machines Corporation | Memory organization with arrays having an alternate data port facility |
US5150328A (en) * | 1988-10-25 | 1992-09-22 | Internation Business Machines Corporation | Memory organization with arrays having an alternate data port facility |
US5278959A (en) * | 1993-03-13 | 1994-01-11 | At&T Bell Laboratories | Processor usable as a bus master or a bus slave |
AU5824598A (en) * | 1997-01-15 | 1998-08-07 | Mackie Designs Inc. | Digital signal mixing architecture |
US6401189B1 (en) | 1998-08-05 | 2002-06-04 | Michael J. Corinthios | General base state assignment for optimal massive parallelism |
US20030172248A1 (en) * | 2000-06-13 | 2003-09-11 | Streltsov Nikolai Victorovich | Synergetic computing system |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2296221A1 (fr) * | 1974-12-27 | 1976-07-23 | Ibm France | Systeme de traitement du signal |
JPS5469038A (en) * | 1977-11-11 | 1979-06-02 | Nec Corp | Data processor |
DD142135A3 (de) * | 1978-05-03 | 1980-06-11 | Wolfgang Henzler | Mehrrechnerkopplung |
US4215395A (en) * | 1978-08-24 | 1980-07-29 | Texas Instruments Incorporated | Dual microprocessor intelligent programmable process control system |
US4224600A (en) * | 1979-03-26 | 1980-09-23 | The Perkin-Elmer Corporation | Arrays for parallel pattern recognition |
JPS57117027A (en) * | 1981-01-13 | 1982-07-21 | Nec Corp | Signal sending and receiving circuit |
US4498134A (en) * | 1982-01-26 | 1985-02-05 | Hughes Aircraft Company | Segregator functional plane for use in a modular array processor |
-
1984
- 1984-08-14 FR FR8412800A patent/FR2569290B1/fr not_active Expired
-
1985
- 1985-08-06 DE DE85201272T patent/DE3587446T2/de not_active Expired - Fee Related
- 1985-08-06 EP EP85201272A patent/EP0171856B1/de not_active Expired - Lifetime
- 1985-08-13 AU AU46141/85A patent/AU4614185A/en not_active Abandoned
- 1985-08-14 CA CA000488719A patent/CA1241764A/en not_active Expired
- 1985-08-14 JP JP60179225A patent/JPH0833876B2/ja not_active Expired - Lifetime
-
1988
- 1988-02-19 US US07/161,340 patent/US4845660A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0171856A1 (de) | 1986-02-19 |
JPH0833876B2 (ja) | 1996-03-29 |
AU4614185A (en) | 1986-02-20 |
FR2569290B1 (fr) | 1986-12-05 |
JPS6184769A (ja) | 1986-04-30 |
US4845660A (en) | 1989-07-04 |
EP0171856B1 (de) | 1993-07-14 |
FR2569290A1 (fr) | 1986-02-21 |
DE3587446D1 (de) | 1993-08-19 |
CA1241764A (en) | 1988-09-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: COMPAGNIE DES SIGNAUX, PARIS, FR |
|
8328 | Change in the person/name/address of the agent |
Free format text: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER, ANWALTSSOZIETAET, 80538 MUENCHEN |
|
8339 | Ceased/non-payment of the annual fee |