DE3581353D1 - Halbleiteranordnung mit monokristalliner schicht aus ga-as auf einem substrat aus silicium und verfahren zu deren herstellung. - Google Patents

Halbleiteranordnung mit monokristalliner schicht aus ga-as auf einem substrat aus silicium und verfahren zu deren herstellung.

Info

Publication number
DE3581353D1
DE3581353D1 DE8585112542T DE3581353T DE3581353D1 DE 3581353 D1 DE3581353 D1 DE 3581353D1 DE 8585112542 T DE8585112542 T DE 8585112542T DE 3581353 T DE3581353 T DE 3581353T DE 3581353 D1 DE3581353 D1 DE 3581353D1
Authority
DE
Germany
Prior art keywords
monocristalline
silicon
production
layer
substrate made
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585112542T
Other languages
English (en)
Inventor
Masayoshi Umeno
Shiro Sakai
Tetsuo Soga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Daido Steel Co Ltd
Original Assignee
Daido Steel Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daido Steel Co Ltd filed Critical Daido Steel Co Ltd
Application granted granted Critical
Publication of DE3581353D1 publication Critical patent/DE3581353D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/0245Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02461Phosphides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02463Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02505Layer structure consisting of more than two layers
    • H01L21/02507Alternating layers, e.g. superlattice
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/149Silicon on III-V

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE8585112542T 1984-10-09 1985-10-03 Halbleiteranordnung mit monokristalliner schicht aus ga-as auf einem substrat aus silicium und verfahren zu deren herstellung. Expired - Fee Related DE3581353D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59213188A JPS6191098A (ja) 1984-10-09 1984-10-09 シリコン基板上における砒素化ガリウム成長結晶体とその結晶成長方法

Publications (1)

Publication Number Publication Date
DE3581353D1 true DE3581353D1 (de) 1991-02-21

Family

ID=16634992

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585112542T Expired - Fee Related DE3581353D1 (de) 1984-10-09 1985-10-03 Halbleiteranordnung mit monokristalliner schicht aus ga-as auf einem substrat aus silicium und verfahren zu deren herstellung.

Country Status (5)

Country Link
US (1) US4789421A (de)
EP (1) EP0177903B1 (de)
JP (1) JPS6191098A (de)
CA (1) CA1265980A (de)
DE (1) DE3581353D1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0214610B1 (de) * 1985-09-03 1990-12-05 Daido Tokushuko Kabushiki Kaisha Epitaktische Gallium-Arsenid-Halbleiterscheibe und Verfahren zu ihrer Herstellung
US5578521A (en) * 1986-11-20 1996-11-26 Nippondenso Co., Ltd. Semiconductor device with vaporphase grown epitaxial
FR2620863B1 (fr) * 1987-09-22 1989-12-01 Thomson Csf Dispositif optoelectronique a base de composes iii-v sur substrat silicium
JPH01107515A (ja) * 1987-10-20 1989-04-25 Daido Steel Co Ltd 半導体素子の製造方法
JP2649936B2 (ja) * 1988-03-01 1997-09-03 富士通株式会社 歪超格子バッファ
US5194395A (en) * 1988-07-28 1993-03-16 Fujitsu Limited Method of producing a substrate having semiconductor-on-insulator structure with gettering sites
JPH0237771A (ja) * 1988-07-28 1990-02-07 Fujitsu Ltd Soi基板
JPH0294663A (ja) * 1988-09-30 1990-04-05 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5198269A (en) * 1989-04-24 1993-03-30 Battelle Memorial Institute Process for making sol-gel deposited ferroelectric thin films insensitive to their substrates
JP2557546B2 (ja) * 1990-03-30 1996-11-27 三菱電機株式会社 半導体装置の製造方法
JP3111644B2 (ja) * 1992-06-09 2000-11-27 三菱化学株式会社 りん化ひ化ガリウムエピタキシャルウエハ
US5993981A (en) * 1997-04-18 1999-11-30 Raytheon Company Broadband protective optical window coating
US20070252216A1 (en) * 2006-04-28 2007-11-01 Infineon Technologies Ag Semiconductor device and a method of manufacturing such a semiconductor device
NO20093193A1 (no) * 2009-10-22 2011-04-26 Integrated Solar As Fremgangsmate for fremstilling av fotoelektriske solceller og en multifunksjonell solcelle

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2225207B1 (de) * 1973-04-16 1978-04-21 Ibm
US4066481A (en) * 1974-11-11 1978-01-03 Rockwell International Corporation Metalorganic chemical vapor deposition of IVA-IVA compounds and composite
US4517047A (en) * 1981-01-23 1985-05-14 The United States Of America As Represented By The Secretary Of The Army MBE growth technique for matching superlattices grown on GaAs substrates
US4578127A (en) * 1982-08-13 1986-03-25 At&T Bell Laboratories Method of making an improved group III-V semiconductor device utilizing a getter-smoothing layer
JPS6012724A (ja) * 1983-07-01 1985-01-23 Agency Of Ind Science & Technol 化合物半導体の成長方法
US4588451A (en) * 1984-04-27 1986-05-13 Advanced Energy Fund Limited Partnership Metal organic chemical vapor deposition of 111-v compounds on silicon

Also Published As

Publication number Publication date
US4789421A (en) 1988-12-06
CA1265980A (en) 1990-02-20
EP0177903A3 (en) 1987-09-09
JPH0463039B2 (de) 1992-10-08
JPS6191098A (ja) 1986-05-09
EP0177903A2 (de) 1986-04-16
EP0177903B1 (de) 1991-01-16

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Free format text: BLUMBACH, KRAMER & PARTNER, 81245 MUENCHEN

8339 Ceased/non-payment of the annual fee