DE3580247D1 - Drei-wannen cmos-technologie. - Google Patents

Drei-wannen cmos-technologie.

Info

Publication number
DE3580247D1
DE3580247D1 DE8585902890T DE3580247T DE3580247D1 DE 3580247 D1 DE3580247 D1 DE 3580247D1 DE 8585902890 T DE8585902890 T DE 8585902890T DE 3580247 T DE3580247 T DE 3580247T DE 3580247 D1 DE3580247 D1 DE 3580247D1
Authority
DE
Germany
Prior art keywords
cmos technology
tub cmos
tub
technology
cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585902890T
Other languages
German (de)
English (en)
Inventor
C Joy
Lal Batra
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AMI SEMICONDUCTOR INC.(N.D.GES.DES STAATES DELAWAR
Original Assignee
American Microsystems Holding Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Microsystems Holding Corp filed Critical American Microsystems Holding Corp
Application granted granted Critical
Publication of DE3580247D1 publication Critical patent/DE3580247D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191—Manufacturing their doped wells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
DE8585902890T 1984-05-25 1985-05-22 Drei-wannen cmos-technologie. Expired - Lifetime DE3580247D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US61441884A 1984-05-25 1984-05-25
PCT/US1985/000990 WO1985005736A1 (en) 1984-05-25 1985-05-22 Tri-well cmos technology

Publications (1)

Publication Number Publication Date
DE3580247D1 true DE3580247D1 (de) 1990-11-29

Family

ID=24461177

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585902890T Expired - Lifetime DE3580247D1 (de) 1984-05-25 1985-05-22 Drei-wannen cmos-technologie.

Country Status (4)

Country Link
EP (1) EP0182876B1 (enExample)
JP (1) JPS61502993A (enExample)
DE (1) DE3580247D1 (enExample)
WO (1) WO1985005736A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0369336A3 (en) * 1988-11-14 1990-08-22 National Semiconductor Corporation Process for fabricating bipolar and cmos transistors on a common substrate
EP0562309B1 (en) * 1992-03-25 2002-06-12 Texas Instruments Incorporated Planar process using common alignment marks for well implants
EP0730305A1 (en) * 1995-02-28 1996-09-04 STMicroelectronics S.r.l. High voltage N-channel MOSFET in CMOS-type technology and relating manufacturing process
JP4508606B2 (ja) 2003-03-20 2010-07-21 株式会社リコー 複数種類のウエルを備えた半導体装置の製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH616024A5 (enExample) * 1977-05-05 1980-02-29 Centre Electron Horloger
US4412142A (en) * 1980-12-24 1983-10-25 General Electric Company Integrated circuit incorporating low voltage and high voltage semiconductor devices
JPS57155768A (en) * 1981-03-23 1982-09-25 Hitachi Ltd Semiconductor integrated circuit device
US4435896A (en) * 1981-12-07 1984-03-13 Bell Telephone Laboratories, Incorporated Method for fabricating complementary field effect transistor devices
US4442591A (en) * 1982-02-01 1984-04-17 Texas Instruments Incorporated High-voltage CMOS process
JPS58170047A (ja) * 1982-03-31 1983-10-06 Fujitsu Ltd 半導体装置

Also Published As

Publication number Publication date
WO1985005736A1 (en) 1985-12-19
EP0182876A1 (en) 1986-06-04
EP0182876B1 (en) 1990-10-24
JPH0560665B2 (enExample) 1993-09-02
EP0182876A4 (en) 1986-11-10
JPS61502993A (ja) 1986-12-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: AMI SEMICONDUCTOR INC.(N.D.GES.DES STAATES DELAWAR

8328 Change in the person/name/address of the agent

Free format text: BECKER UND KOLLEGEN, 40878 RATINGEN