DE3485179D1 - Eingabe/ausgabe-multiplexer-demultiplexer fuer uebertragungskanal. - Google Patents

Eingabe/ausgabe-multiplexer-demultiplexer fuer uebertragungskanal.

Info

Publication number
DE3485179D1
DE3485179D1 DE8484307878T DE3485179T DE3485179D1 DE 3485179 D1 DE3485179 D1 DE 3485179D1 DE 8484307878 T DE8484307878 T DE 8484307878T DE 3485179 T DE3485179 T DE 3485179T DE 3485179 D1 DE3485179 D1 DE 3485179D1
Authority
DE
Germany
Prior art keywords
communications
data
channel
input
ports
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484307878T
Other languages
English (en)
Inventor
Robert Goodman William
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tandem Computers Inc
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Application granted granted Critical
Publication of DE3485179D1 publication Critical patent/DE3485179D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0745Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in an input/output transactions management context
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793Remedial or corrective actions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/50Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
    • H04L12/52Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques
    • H04L12/525Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques involving a stored program control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Communication Control (AREA)
  • Sub-Exchange Stations And Push- Button Telephones (AREA)
  • Small-Scale Networks (AREA)
DE8484307878T 1983-11-14 1984-11-14 Eingabe/ausgabe-multiplexer-demultiplexer fuer uebertragungskanal. Expired - Lifetime DE3485179D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/551,278 US4667321A (en) 1983-11-14 1983-11-14 Input-output multiplexer-demultiplexer communications channel

Publications (1)

Publication Number Publication Date
DE3485179D1 true DE3485179D1 (de) 1991-11-21

Family

ID=24200593

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484307878T Expired - Lifetime DE3485179D1 (de) 1983-11-14 1984-11-14 Eingabe/ausgabe-multiplexer-demultiplexer fuer uebertragungskanal.

Country Status (7)

Country Link
US (1) US4667321A (de)
EP (1) EP0145319B1 (de)
JP (1) JPH0630519B2 (de)
AT (1) ATE68614T1 (de)
AU (1) AU577807B2 (de)
CA (1) CA1229183A (de)
DE (1) DE3485179D1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USH696H (en) 1984-07-03 1989-10-03 Cpt Corporation System for accessing shared resource device by intelligent user devices
FR2591773A1 (fr) * 1985-12-18 1987-06-19 Bioconcept Sa Systeme de connexion entre un ordinateur et une serie de peripheriques
US5047957A (en) * 1988-10-21 1991-09-10 Minolta Camera Kabushiki Kaisha Printer controller
US5220566A (en) * 1989-02-10 1993-06-15 Minolta Camera Kabushiki Kaisha Multiplexer for use in data processing system
US5247671A (en) * 1990-02-14 1993-09-21 International Business Machines Corporation Scalable schedules for serial communications controller in data processing systems
JPH0573697A (ja) * 1991-08-30 1993-03-26 Nec Corp マイクロコンピユータ
IT1270375B (it) * 1993-05-26 1997-05-05 Lgl Electronics Spa Sistema di interfacciamento di una o piu' unita' periferiche intelligenti con un telaio di tessitura o altra macchina tessile
US7551554B2 (en) * 2000-11-29 2009-06-23 Intel Corporation Fragmenting a packet
JP4567233B2 (ja) * 2001-04-26 2010-10-20 富士通株式会社 通信装置及びその制御方法
WO2016109571A1 (en) 2014-12-30 2016-07-07 Micron Technology, Inc Devices for time division multiplexing of state machine engine signals
JP6993323B2 (ja) * 2016-04-22 2022-01-13 興和株式会社 マルチプレクサ、及び該マルチプレクサを備えた撮影装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU482164B2 (en) * 1972-11-13 1975-05-15 Lm ERICSSON PTY. LTD TIME DIVISION MULTIPLEXED Specification DIGITAL SWITCHING APPARATUS V
GB1478363A (en) * 1974-07-30 1977-06-29 Mullard Ltd Data transmission systems
DE2442990B2 (de) * 1974-09-07 1978-03-23 Philips Patentverwaltung Gmbh, 2000 Hamburg Rechnersystem mit Peripheriegeräten
IT1030925B (it) * 1974-12-19 1979-04-10 Sits Soc It Telecom Siemens Unita di controllo della segnalazione
SE383674B (sv) * 1975-04-28 1976-03-22 Ellemtel Utvecklings Ab Sett och anordning for adressering av ett buffertminne i en formedlingsstation for synkrona datasignaler
FR2344894A1 (fr) * 1976-03-19 1977-10-14 Glotin Jean Perfectionnement aux systemes de gestion automatique multi-voie
JPS607421B2 (ja) * 1976-06-17 1985-02-25 松下電器産業株式会社 データ伝送装置
US4143242A (en) * 1976-07-14 1979-03-06 Hitachi, Ltd. Analog-digital code converter in a digital telephone switching system
US4131763A (en) * 1976-09-16 1978-12-26 L M Ericsson Pty. Ltd. Bit switching of word synchronized data
JPS5336115A (en) * 1976-09-16 1978-04-04 Fujitsu Ltd Polling control system
US4199662A (en) * 1978-07-17 1980-04-22 Lowe Charles S Jr Hybrid control of time division multiplexing
JPS5658347A (en) * 1979-10-18 1981-05-21 Omron Tateisi Electronics Co Data transmission method
US4393464A (en) * 1980-12-12 1983-07-12 Ncr Corporation Chip topography for integrated circuit communication controller

Also Published As

Publication number Publication date
JPH0630519B2 (ja) 1994-04-20
CA1229183A (en) 1987-11-10
EP0145319A3 (en) 1986-12-30
US4667321A (en) 1987-05-19
EP0145319B1 (de) 1991-10-16
ATE68614T1 (de) 1991-11-15
EP0145319A2 (de) 1985-06-19
AU3543884A (en) 1985-05-23
AU577807B2 (en) 1988-10-06
JPS60117942A (ja) 1985-06-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee