DE3484220D1 - Herstellung von mos-integrierten schaltungsvorrichtungen. - Google Patents
Herstellung von mos-integrierten schaltungsvorrichtungen.Info
- Publication number
- DE3484220D1 DE3484220D1 DE8484900790T DE3484220T DE3484220D1 DE 3484220 D1 DE3484220 D1 DE 3484220D1 DE 8484900790 T DE8484900790 T DE 8484900790T DE 3484220 T DE3484220 T DE 3484220T DE 3484220 D1 DE3484220 D1 DE 3484220D1
- Authority
- DE
- Germany
- Prior art keywords
- integrated circuit
- circuit devices
- manufacturing mos
- mos
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3215—Doping the layers
- H01L21/32155—Doping polycristalline - or amorphous silicon layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/468,032 US4450620A (en) | 1983-02-18 | 1983-02-18 | Fabrication of MOS integrated circuit devices |
PCT/US1984/000065 WO1984003391A1 (en) | 1983-02-18 | 1984-01-19 | Fabrication of mos integrated circuit devices |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3484220D1 true DE3484220D1 (de) | 1991-04-11 |
Family
ID=23858166
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8484900790T Expired - Lifetime DE3484220D1 (de) | 1983-02-18 | 1984-01-19 | Herstellung von mos-integrierten schaltungsvorrichtungen. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4450620A (de) |
EP (1) | EP0137805B1 (de) |
JP (1) | JPH07112062B2 (de) |
DE (1) | DE3484220D1 (de) |
WO (1) | WO1984003391A1 (de) |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3304588A1 (de) * | 1983-02-10 | 1984-08-16 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von mos-transistoren mit flachen source/drain-gebieten, kurzen kanallaengen und einer selbstjustierten, aus einem metallsilizid bestehenden kontaktierungsebene |
US4514893A (en) * | 1983-04-29 | 1985-05-07 | At&T Bell Laboratories | Fabrication of FETs |
US4587709A (en) * | 1983-06-06 | 1986-05-13 | International Business Machines Corporation | Method of making short channel IGFET |
FR2549293B1 (fr) * | 1983-07-13 | 1986-10-10 | Silicium Semiconducteur Ssc | Transistor bipolaire haute frequence et son procede de fabrication |
US4549914A (en) * | 1984-04-09 | 1985-10-29 | At&T Bell Laboratories | Integrated circuit contact technique |
CA1278273C (en) * | 1984-08-20 | 1990-12-27 | Robert Lajos | Forming polycide structure comprised of polysilicon, silicon, and metal silicide lavers |
US4663825A (en) * | 1984-09-27 | 1987-05-12 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device |
US4612258A (en) * | 1984-12-21 | 1986-09-16 | Zilog, Inc. | Method for thermally oxidizing polycide substrates in a dry oxygen environment and semiconductor circuit structures produced thereby |
US4597163A (en) * | 1984-12-21 | 1986-07-01 | Zilog, Inc. | Method of improving film adhesion between metallic silicide and polysilicon in thin film integrated circuit structures |
US5100824A (en) * | 1985-04-01 | 1992-03-31 | National Semiconductor Corporation | Method of making small contactless RAM cell |
US5072275A (en) * | 1986-02-28 | 1991-12-10 | Fairchild Semiconductor Corporation | Small contactless RAM cell |
US4764480A (en) * | 1985-04-01 | 1988-08-16 | National Semiconductor Corporation | Process for making high performance CMOS and bipolar integrated devices on one substrate with reduced cell size |
US5340762A (en) * | 1985-04-01 | 1994-08-23 | Fairchild Semiconductor Corporation | Method of making small contactless RAM cell |
JPS62502718A (ja) * | 1985-05-03 | 1987-10-15 | アメリカン テレフオン アンド テレグラフ カムパニ− | ポリサイドプロセス |
US4648175A (en) * | 1985-06-12 | 1987-03-10 | Ncr Corporation | Use of selectively deposited tungsten for contact formation and shunting metallization |
US4843033A (en) * | 1985-09-27 | 1989-06-27 | Texas Instruments Incorporated | Method for outdiffusion of zinc into III-V substrates using zinc tungsten silicide as dopant source |
US4866002A (en) * | 1985-11-26 | 1989-09-12 | Fuji Photo Film Co., Ltd. | Complementary insulated-gate field effect transistor integrated circuit and manufacturing method thereof |
US4782033A (en) * | 1985-11-27 | 1988-11-01 | Siemens Aktiengesellschaft | Process for producing CMOS having doped polysilicon gate by outdiffusion of boron from implanted silicide gate |
US4788160A (en) * | 1987-03-31 | 1988-11-29 | Texas Instruments Incorporated | Process for formation of shallow silicided junctions |
US5059546A (en) * | 1987-05-01 | 1991-10-22 | Texas Instruments Incorporated | BICMOS process for forming shallow NPN emitters and mosfet source/drains |
US4816423A (en) * | 1987-05-01 | 1989-03-28 | Texas Instruments Incorporated | Bicmos process for forming shallow npn emitters and mosfet source/drains |
US4774204A (en) * | 1987-06-02 | 1988-09-27 | Texas Instruments Incorporated | Method for forming self-aligned emitters and bases and source/drains in an integrated circuit |
US4933994A (en) * | 1987-06-11 | 1990-06-19 | General Electric Company | Method for fabricating a self-aligned lightly doped drain semiconductor device with silicide |
US4764481A (en) * | 1987-08-24 | 1988-08-16 | Delco Electronics Corporation | Grown side-wall silicided source/drain self-align CMOS fabrication process |
KR900008868B1 (ko) * | 1987-09-30 | 1990-12-11 | 삼성전자 주식회사 | 저항성 접촉을 갖는 반도체 장치의 제조방법 |
US4786611A (en) * | 1987-10-19 | 1988-11-22 | Motorola, Inc. | Adjusting threshold voltages by diffusion through refractory metal silicides |
US4945070A (en) * | 1989-01-24 | 1990-07-31 | Harris Corporation | Method of making cmos with shallow source and drain junctions |
US5683924A (en) * | 1994-10-31 | 1997-11-04 | Sgs-Thomson Microelectronics, Inc. | Method of forming raised source/drain regions in a integrated circuit |
JPH08264660A (ja) * | 1995-03-24 | 1996-10-11 | Nec Corp | 半導体装置の製造方法 |
US5682055A (en) * | 1995-06-07 | 1997-10-28 | Sgs-Thomson Microelectronics, Inc. | Method of forming planarized structures in an integrated circuit |
US5773197A (en) * | 1996-10-28 | 1998-06-30 | International Business Machines Corporation | Integrated circuit device and process for its manufacture |
JP3355127B2 (ja) * | 1998-02-23 | 2002-12-09 | 株式会社日立製作所 | 熱式空気流量センサ |
JP2000124219A (ja) * | 1998-08-11 | 2000-04-28 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
KR100329769B1 (ko) | 1998-12-22 | 2002-07-18 | 박종섭 | 티타늄폴리사이드게이트전극형성방법 |
US6599831B1 (en) * | 2002-04-30 | 2003-07-29 | Advanced Micro Devices, Inc. | Metal gate electrode using silicidation and method of formation thereof |
KR100612419B1 (ko) | 2004-10-19 | 2006-08-16 | 삼성전자주식회사 | 핀 트랜지스터 및 평판 트랜지스터를 갖는 반도체 소자 및그 형성 방법 |
US8211786B2 (en) * | 2008-02-28 | 2012-07-03 | International Business Machines Corporation | CMOS structure including non-planar hybrid orientation substrate with planar gate electrodes and method for fabrication |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4180596A (en) * | 1977-06-30 | 1979-12-25 | International Business Machines Corporation | Method for providing a metal silicide layer on a substrate |
US4329706A (en) * | 1979-03-01 | 1982-05-11 | International Business Machines Corporation | Doped polysilicon silicide semiconductor integrated circuit interconnections |
JPS55121666A (en) * | 1979-03-13 | 1980-09-18 | Seiko Epson Corp | Mos transistor circuit |
JPS55121667A (en) * | 1979-03-13 | 1980-09-18 | Seiko Epson Corp | Integrated circuit |
US4276688A (en) * | 1980-01-21 | 1981-07-07 | Rca Corporation | Method for forming buried contact complementary MOS devices |
US4343082A (en) * | 1980-04-17 | 1982-08-10 | Bell Telephone Laboratories, Incorporated | Method of making contact electrodes to silicon gate, and source and drain regions, of a semiconductor device |
JPS5836505B2 (ja) * | 1980-06-30 | 1983-08-09 | 富士通株式会社 | 半導体記憶装置の製造方法 |
DE3131875A1 (de) * | 1980-08-18 | 1982-03-25 | Fairchild Camera and Instrument Corp., 94042 Mountain View, Calif. | "verfahren zum herstellen einer halbleiterstruktur und halbleiterstruktur" |
NL186352C (nl) * | 1980-08-27 | 1990-11-01 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
US4339869A (en) * | 1980-09-15 | 1982-07-20 | General Electric Company | Method of making low resistance contacts in semiconductor devices by ion induced silicides |
IE52791B1 (en) * | 1980-11-05 | 1988-03-02 | Fujitsu Ltd | Semiconductor devices |
US4446476A (en) * | 1981-06-30 | 1984-05-01 | International Business Machines Corporation | Integrated circuit having a sublayer electrical contact and fabrication thereof |
DE3133468A1 (de) * | 1981-08-25 | 1983-03-17 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von hochintegrierten komplementaeren mos-feldeffekttransistorschaltungen in siliziumgate-technologie |
-
1983
- 1983-02-18 US US06/468,032 patent/US4450620A/en not_active Expired - Lifetime
-
1984
- 1984-01-19 EP EP84900790A patent/EP0137805B1/de not_active Expired
- 1984-01-19 JP JP59500793A patent/JPH07112062B2/ja not_active Expired - Lifetime
- 1984-01-19 DE DE8484900790T patent/DE3484220D1/de not_active Expired - Lifetime
- 1984-01-19 WO PCT/US1984/000065 patent/WO1984003391A1/en active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
EP0137805A4 (de) | 1988-02-03 |
EP0137805A1 (de) | 1985-04-24 |
EP0137805B1 (de) | 1991-03-06 |
JPH07112062B2 (ja) | 1995-11-29 |
WO1984003391A1 (en) | 1984-08-30 |
JPS60500836A (ja) | 1985-05-30 |
US4450620A (en) | 1984-05-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Free format text: BLUMBACH, KRAMER & PARTNER, 65193 WIESBADEN |