DE3481466D1 - Methode zur herstellung eines gaas jfet mit selbstjustiertem p-typ gate. - Google Patents

Methode zur herstellung eines gaas jfet mit selbstjustiertem p-typ gate.

Info

Publication number
DE3481466D1
DE3481466D1 DE8484309167T DE3481466T DE3481466D1 DE 3481466 D1 DE3481466 D1 DE 3481466D1 DE 8484309167 T DE8484309167 T DE 8484309167T DE 3481466 T DE3481466 T DE 3481466T DE 3481466 D1 DE3481466 D1 DE 3481466D1
Authority
DE
Germany
Prior art keywords
self
producing
adjusted
type gate
gaas jfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484309167T
Other languages
English (en)
Inventor
Nobuyuki C O Patent Div Toyoda
Naotaka C O Patent Di Uchitomi
Akimichi C O Patent Divis Hojo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3481466D1 publication Critical patent/DE3481466D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/452—Ohmic electrodes on AIII-BV compounds
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/082—Ion implantation FETs/COMs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/088—J-Fet, i.e. junction field effect transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
DE8484309167T 1984-04-18 1984-12-31 Methode zur herstellung eines gaas jfet mit selbstjustiertem p-typ gate. Expired - Lifetime DE3481466D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59077710A JPS60220975A (ja) 1984-04-18 1984-04-18 ＧａＡｓ電界効果トランジスタ及びその製造方法

Publications (1)

Publication Number Publication Date
DE3481466D1 true DE3481466D1 (de) 1990-04-05

Family

ID=13641444

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484309167T Expired - Lifetime DE3481466D1 (de) 1984-04-18 1984-12-31 Methode zur herstellung eines gaas jfet mit selbstjustiertem p-typ gate.

Country Status (4)

Country Link
US (1) US5015596A (de)
EP (1) EP0158752B1 (de)
JP (1) JPS60220975A (de)
DE (1) DE3481466D1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5231474A (en) * 1986-03-21 1993-07-27 Advanced Power Technology, Inc. Semiconductor device with doped electrical breakdown control region
JPS644079A (en) * 1987-06-26 1989-01-09 Yokogawa Electric Corp Manufacture of junction type fet
JPS6468975A (en) * 1987-09-09 1989-03-15 Yokogawa Electric Corp Manufacture of junction fet
JP3298313B2 (ja) 1994-06-10 2002-07-02 ソニー株式会社 接合形電界効果トランジスタ及びその作製方法
US5670393A (en) * 1995-07-12 1997-09-23 Lsi Logic Corporation Method of making combined metal oxide semiconductor and junction field effect transistor device
JPH11274468A (ja) * 1998-03-25 1999-10-08 Sony Corp オーミック電極およびその形成方法ならびにオーミック電極形成用積層体
US7217977B2 (en) * 2004-04-19 2007-05-15 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US6815816B1 (en) * 2000-10-25 2004-11-09 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
US7049667B2 (en) 2002-09-27 2006-05-23 Hrl Laboratories, Llc Conductive channel pseudo block process and circuit to inhibit reverse engineering
US6979606B2 (en) 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
AU2003293540A1 (en) 2002-12-13 2004-07-09 Raytheon Company Integrated circuit modification using well implants
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
US7569873B2 (en) * 2005-10-28 2009-08-04 Dsm Solutions, Inc. Integrated circuit using complementary junction field effect transistor and MOS transistor in silicon and silicon alloys
US8168487B2 (en) * 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer
US7772056B2 (en) * 2007-06-18 2010-08-10 University Of Utah Research Foundation Transistors for replacing metal-oxide semiconductor field-effect transistors in nanoelectronics
US7648898B2 (en) * 2008-02-19 2010-01-19 Dsm Solutions, Inc. Method to fabricate gate electrodes
RU2660296C1 (ru) * 2017-02-20 2018-07-05 Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) Способ изготовления полупроводникового прибора

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL277812A (de) * 1961-04-27
US3601888A (en) * 1969-04-25 1971-08-31 Gen Electric Semiconductor fabrication technique and devices formed thereby utilizing a doped metal conductor
US3768151A (en) * 1970-11-03 1973-10-30 Ibm Method of forming ohmic contacts to semiconductors
JPS5315081A (en) * 1976-07-27 1978-02-10 Nec Corp Junction type field effect transistor and its production
JPS5413879A (en) * 1977-07-01 1979-02-01 Hitachi Ltd Anti-vibration rubber equipped with vibration controller
JPS55153377A (en) * 1979-05-18 1980-11-29 Matsushita Electronics Corp Production of semiconductor device
US4234357A (en) * 1979-07-16 1980-11-18 Trw Inc. Process for manufacturing emitters by diffusion from polysilicon
US4380774A (en) * 1980-12-19 1983-04-19 The United States Of America As Represented By The Secretary Of The Navy High-performance bipolar microwave transistor
JPS57178376A (en) * 1981-04-27 1982-11-02 Sumitomo Electric Ind Ltd Junction type field-effect transistor
JPS57178374A (en) * 1981-04-27 1982-11-02 Sumitomo Electric Ind Ltd Junction type field-efect transistor and its manufacture
US4433470A (en) * 1981-05-19 1984-02-28 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing semiconductor device utilizing selective etching and diffusion
JPS5844771A (ja) * 1981-09-10 1983-03-15 Mitsubishi Electric Corp 接合形電界効果トランジスタおよびその製造方法
US4452646A (en) * 1981-09-28 1984-06-05 Mcdonnell Douglas Corporation Method of making planar III-V compound device by ion implantation
FR2517120A1 (fr) * 1981-11-26 1983-05-27 Michel Salvi Procede de fabrication d'un composant semiconducteur par diffusion avec implantation ionique prealable et composant obtenu
US4495512A (en) * 1982-06-07 1985-01-22 International Business Machines Corporation Self-aligned bipolar transistor with inverted polycide base contact
JPS59213172A (ja) * 1983-05-19 1984-12-03 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
FR2549293B1 (fr) * 1983-07-13 1986-10-10 Silicium Semiconducteur Ssc Transistor bipolaire haute frequence et son procede de fabrication
US4593457A (en) * 1984-12-17 1986-06-10 Motorola, Inc. Method for making gallium arsenide NPN transistor with self-aligned base enhancement to emitter region and metal contact
US4843033A (en) * 1985-09-27 1989-06-27 Texas Instruments Incorporated Method for outdiffusion of zinc into III-V substrates using zinc tungsten silicide as dopant source
US4912053A (en) * 1988-02-01 1990-03-27 Harris Corporation Ion implanted JFET with self-aligned source and drain
IT1225623B (it) * 1988-10-20 1990-11-22 Sgs Thomson Microelectronics Formazione di contatti autoallineati senza l'impiego di una relativa maschera

Also Published As

Publication number Publication date
EP0158752B1 (de) 1990-02-28
EP0158752A3 (en) 1986-10-22
EP0158752A2 (de) 1985-10-23
JPS60220975A (ja) 1985-11-05
JPH0224023B2 (de) 1990-05-28
US5015596A (en) 1991-05-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee