DE3381072D1 - Kippschaltung mit differentieller kaskodenstromschalterlogik. - Google Patents
Kippschaltung mit differentieller kaskodenstromschalterlogik.Info
- Publication number
- DE3381072D1 DE3381072D1 DE8383108571T DE3381072T DE3381072D1 DE 3381072 D1 DE3381072 D1 DE 3381072D1 DE 8383108571 T DE8383108571 T DE 8383108571T DE 3381072 T DE3381072 T DE 3381072T DE 3381072 D1 DE3381072 D1 DE 3381072D1
- Authority
- DE
- Germany
- Prior art keywords
- current switch
- switch logic
- cascode current
- differential cascode
- toggle switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
- H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
- H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
- H03K3/2885—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit the input circuit having a differential configuration
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/445,599 US4513283A (en) | 1982-11-30 | 1982-11-30 | Latch circuits with differential cascode current switch logic |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3381072D1 true DE3381072D1 (de) | 1990-02-08 |
Family
ID=23769531
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8383108571T Expired - Fee Related DE3381072D1 (de) | 1982-11-30 | 1983-08-31 | Kippschaltung mit differentieller kaskodenstromschalterlogik. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4513283A (de) |
EP (1) | EP0111055B1 (de) |
JP (1) | JPS59101924A (de) |
DE (1) | DE3381072D1 (de) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5218363A (en) * | 1982-04-12 | 1993-06-08 | Lecroy Corporation | High-speed switching tree with input sampling pulses of constant frequency and means for varying the effective sampling rate |
US4580137A (en) * | 1983-08-29 | 1986-04-01 | International Business Machines Corporation | LSSD-testable D-type edge-trigger-operable latch with overriding set/reset asynchronous control |
GB8324710D0 (en) * | 1983-09-15 | 1983-10-19 | Ferranti Plc | Bipolar transistor logic circuits |
US4607172A (en) * | 1984-02-13 | 1986-08-19 | National Semiconductor Corporation | Bipolar strobed transistor latch for a high gain comparator |
US4675553A (en) * | 1984-03-12 | 1987-06-23 | Amdahl Corporation | Sequential logic circuits implemented with inverter function logic |
US4628217A (en) * | 1984-03-22 | 1986-12-09 | Sperry Corporation | Fast scan/set testable latch using two levels of series gating with one current source |
US4621201A (en) * | 1984-03-30 | 1986-11-04 | Trilogy Systems Corporation | Integrated circuit redundancy and method for achieving high-yield production |
EP0206891A3 (de) * | 1985-06-13 | 1989-10-25 | Digital Equipment Corporation | Verriegelungsschaltung in emittergekoppelter Logik mit einem Eingangs-Schaltnetzwerk für Boolesche Logik |
US4686392A (en) * | 1985-10-30 | 1987-08-11 | International Business Machines Corporation | Multi-functional differential cascode voltage switch logic |
US4760289A (en) * | 1986-08-04 | 1988-07-26 | International Business Machines Corporation | Two-level differential cascode current switch masterslice |
EP0264334B1 (de) * | 1986-10-16 | 1994-12-28 | Fairchild Semiconductor Corporation | Synchrone Array-Logikschaltung |
US4739194A (en) * | 1986-11-25 | 1988-04-19 | Tektronix, Inc. | Supergate for high speed transmission of signals |
US4970417A (en) * | 1988-07-07 | 1990-11-13 | Fujitsu Limited | Emitter coupled logic latch circuit |
US5124591A (en) * | 1990-09-04 | 1992-06-23 | International Business Machines Corporation | Low power push pull driver |
US5272397A (en) * | 1992-03-27 | 1993-12-21 | International Business Machines Corp. | Basic DCVS circuits with dual function load circuits |
US5293083A (en) * | 1992-06-30 | 1994-03-08 | International Business Machines Corporation | Fast limited swing push-pull driver |
US5475815A (en) * | 1994-04-11 | 1995-12-12 | Unisys Corporation | Built-in-self-test scheme for testing multiple memory elements |
US5612965A (en) * | 1994-04-26 | 1997-03-18 | Unisys Corporation | Multiple memory bit/chip failure detection |
US5666371A (en) * | 1995-02-24 | 1997-09-09 | Unisys Corporation | Method and apparatus for detecting errors in a system that employs multi-bit wide memory elements |
US5701313A (en) * | 1995-02-24 | 1997-12-23 | Unisys Corporation | Method and apparatus for removing soft errors from a memory |
US5511164A (en) * | 1995-03-01 | 1996-04-23 | Unisys Corporation | Method and apparatus for determining the source and nature of an error within a computer system |
US5784382A (en) * | 1995-03-01 | 1998-07-21 | Unisys Corporation | Method and apparatus for dynamically testing a memory within a computer system |
US6215330B1 (en) | 1999-06-11 | 2001-04-10 | Trw Inc. | Differential diode transistor logic (DDTL) circuit enhancements |
US7656196B2 (en) * | 2004-02-25 | 2010-02-02 | Ternarylogic Llc | Multi-state latches from n-state reversible inverters |
US7397690B2 (en) * | 2004-06-01 | 2008-07-08 | Temarylogic Llc | Multi-valued digital information retaining elements and memory devices |
US7782089B2 (en) * | 2005-05-27 | 2010-08-24 | Ternarylogic Llc | Multi-state latches from n-state reversible inverters |
CN111585546B (zh) * | 2020-04-09 | 2022-06-07 | 北京大学 | 基于阻变存储器的非挥发性锁存器电路及操作方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1211006B (de) * | 1961-08-14 | 1966-02-17 | Sperry Rand Corp | Datenverarbeitungssystem |
US3446989A (en) * | 1966-08-15 | 1969-05-27 | Motorola Inc | Multiple level logic circuitry |
US3806891A (en) * | 1972-12-26 | 1974-04-23 | Ibm | Logic circuit for scan-in/scan-out |
US3783254A (en) * | 1972-10-16 | 1974-01-01 | Ibm | Level sensitive logic system |
US4237387A (en) * | 1978-02-21 | 1980-12-02 | Hughes Aircraft Company | High speed latching comparator |
US4276488A (en) * | 1978-11-13 | 1981-06-30 | Hughes Aircraft Company | Multi-master single-slave ECL flip-flop |
JPS5617515A (en) * | 1979-07-23 | 1981-02-19 | Nec Corp | Flip-flop circuit |
-
1982
- 1982-11-30 US US06/445,599 patent/US4513283A/en not_active Expired - Fee Related
-
1983
- 1983-08-12 JP JP58146795A patent/JPS59101924A/ja active Granted
- 1983-08-31 EP EP83108571A patent/EP0111055B1/de not_active Expired
- 1983-08-31 DE DE8383108571T patent/DE3381072D1/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0111055A2 (de) | 1984-06-20 |
EP0111055B1 (de) | 1990-01-03 |
JPS59101924A (ja) | 1984-06-12 |
JPH025049B2 (de) | 1990-01-31 |
EP0111055A3 (en) | 1986-12-30 |
US4513283A (en) | 1985-04-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |