DE3380384D1 - Cmos device - Google Patents

Cmos device

Info

Publication number
DE3380384D1
DE3380384D1 DE8383301735T DE3380384T DE3380384D1 DE 3380384 D1 DE3380384 D1 DE 3380384D1 DE 8383301735 T DE8383301735 T DE 8383301735T DE 3380384 T DE3380384 T DE 3380384T DE 3380384 D1 DE3380384 D1 DE 3380384D1
Authority
DE
Germany
Prior art keywords
cmos device
cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383301735T
Other languages
English (en)
Inventor
Touru Inaba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3380384D1 publication Critical patent/DE3380384D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0927—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising a P-well only in the substrate
DE8383301735T 1982-03-31 1983-03-28 Cmos device Expired DE3380384D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57053072A JPS58170047A (ja) 1982-03-31 1982-03-31 半導体装置

Publications (1)

Publication Number Publication Date
DE3380384D1 true DE3380384D1 (en) 1989-09-14

Family

ID=12932605

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383301735T Expired DE3380384D1 (en) 1982-03-31 1983-03-28 Cmos device

Country Status (3)

Country Link
EP (1) EP0091256B1 (de)
JP (1) JPS58170047A (de)
DE (1) DE3380384D1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4697332A (en) * 1984-05-25 1987-10-06 Gould Inc. Method of making tri-well CMOS by self-aligned process
WO1985005736A1 (en) * 1984-05-25 1985-12-19 American Microsystems, Inc. Tri-well cmos technology
JPS61111576A (ja) * 1984-10-13 1986-05-29 Fujitsu Ltd 半導体装置
JPS63136661A (ja) * 1986-11-28 1988-06-08 Sony Corp 半導体装置の製造方法
US5055903A (en) * 1989-06-22 1991-10-08 Siemens Aktiengesellschaft Circuit for reducing the latch-up sensitivity of a cmos circuit
US6406955B1 (en) 1994-05-17 2002-06-18 Samsung Electronics Co., Ltd Method for manufacturing CMOS devices having transistors with mutually different punch-through voltage characteristics
KR0144959B1 (ko) * 1994-05-17 1998-07-01 김광호 반도체장치 및 제조방법
EP0730305A1 (de) * 1995-02-28 1996-09-04 STMicroelectronics S.r.l. Hochspannungs-N-Kanal-MOSFET in CMOS-Typ-Technologie und Herstellungsverfahren
JP3528350B2 (ja) * 1995-08-25 2004-05-17 ソニー株式会社 半導体装置の製造方法
JP3472476B2 (ja) * 1998-04-17 2003-12-02 松下電器産業株式会社 半導体装置及びその駆動方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5513967A (en) * 1978-07-17 1980-01-31 Nec Corp Semiconductor integrated circuit device
JPS5787161A (en) * 1980-11-20 1982-05-31 Seiko Epson Corp Mos integrated circuit

Also Published As

Publication number Publication date
JPS58170047A (ja) 1983-10-06
EP0091256B1 (de) 1989-08-09
EP0091256A2 (de) 1983-10-12
EP0091256A3 (en) 1985-09-11

Similar Documents

Publication Publication Date Title
GB2123287B (en) Depilaton device
DE3374748D1 (en) Program-selecting device
GB8309919D0 (en) Auto-unscrewing device
GB8311180D0 (en) Thermoelectric device
GB8317886D0 (en) Securing device
GB8317602D0 (en) Boring-injection device
DE3366797D1 (en) Secret-speech device
GB2132485B (en) Electrotherapeutical device
GB2125187B (en) Tracking-servo device
GB2152781B (en) Imaging device
GB2129950B (en) Camera
DE3373165D1 (en) Solid state image-sensing device
ZA831870B (en) Retaining device
GB2130470B (en) Ear-protection device
GB2132381B (en) Camera
DE3380384D1 (en) Cmos device
GB2120915B (en) Application device
GB2125979B (en) Camera
DE3374913D1 (en) Walking device
GB8314781D0 (en) Warp-assembling device
GB2119926B (en) Photoelectric device
GB8310218D0 (en) Cover-equipped camera
GB2126615B (en) Scaffold-securing devices
GB8318064D0 (en) Connecting device
DE3360792D1 (en) Dosing-feeding device

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee