DE3380133D1 - A dynamic semiconductor memory device - Google Patents
A dynamic semiconductor memory deviceInfo
- Publication number
- DE3380133D1 DE3380133D1 DE8383305872T DE3380133T DE3380133D1 DE 3380133 D1 DE3380133 D1 DE 3380133D1 DE 8383305872 T DE8383305872 T DE 8383305872T DE 3380133 T DE3380133 T DE 3380133T DE 3380133 D1 DE3380133 D1 DE 3380133D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- dynamic semiconductor
- dynamic
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/14—Word line organisation; Word line lay-out
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57170682A JPS5960794A (ja) | 1982-09-29 | 1982-09-29 | ダイナミツク型半導体記憶装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3380133D1 true DE3380133D1 (en) | 1989-08-03 |
Family
ID=15909434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8383305872T Expired DE3380133D1 (en) | 1982-09-29 | 1983-09-29 | A dynamic semiconductor memory device |
Country Status (4)
Country | Link |
---|---|
US (1) | US4597059A (de) |
EP (1) | EP0107921B1 (de) |
JP (1) | JPS5960794A (de) |
DE (1) | DE3380133D1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0793009B2 (ja) * | 1984-12-13 | 1995-10-09 | 株式会社東芝 | 半導体記憶装置 |
JPS62165788A (ja) * | 1986-01-16 | 1987-07-22 | Sharp Corp | 半導体集積回路装置 |
EP0915421B1 (de) * | 1996-03-01 | 2001-03-07 | Mitsubishi Denki Kabushiki Kaisha | Halbleiterspeichergerät, um Fehlfunktion durch Spaltenauswahlleitungsunterbrechung oder Zeilenauswahlleitungsunterbrechung zu vermeiden |
EP0953983A3 (de) * | 1996-03-01 | 2005-10-05 | Mitsubishi Denki Kabushiki Kaisha | Halbleiterspeichergerät mit Klemmschaltung zur Fehlfunktionsvermeidung |
JP5690083B2 (ja) * | 2010-05-19 | 2015-03-25 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体記憶装置 |
JP5539916B2 (ja) | 2011-03-04 | 2014-07-02 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5922994B2 (ja) * | 2012-06-13 | 2016-05-24 | ルネサスエレクトロニクス株式会社 | Dram装置 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3810124A (en) * | 1972-06-30 | 1974-05-07 | Ibm | Memory accessing system |
US4074237A (en) * | 1976-03-08 | 1978-02-14 | International Business Machines Corporation | Word line clamping circuit and decoder |
US4115871A (en) * | 1977-04-19 | 1978-09-19 | National Semiconductor Corporation | MOS random memory array |
JPS6027115B2 (ja) * | 1977-10-19 | 1985-06-27 | 株式会社日立製作所 | Ram半導体集積回路 |
JPS56112122A (en) * | 1980-02-08 | 1981-09-04 | Fujitsu Ltd | Decoder circuit |
US4360902A (en) * | 1980-06-02 | 1982-11-23 | Mostek Corporation | Semiconductor memory decoder with nonselected row line hold down |
JPS5948890A (ja) * | 1982-09-10 | 1984-03-21 | Nec Corp | メモリ回路 |
-
1982
- 1982-09-29 JP JP57170682A patent/JPS5960794A/ja active Granted
-
1983
- 1983-09-26 US US06/535,987 patent/US4597059A/en not_active Expired - Lifetime
- 1983-09-29 EP EP83305872A patent/EP0107921B1/de not_active Expired
- 1983-09-29 DE DE8383305872T patent/DE3380133D1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US4597059A (en) | 1986-06-24 |
JPH0410154B2 (de) | 1992-02-24 |
EP0107921A2 (de) | 1984-05-09 |
EP0107921B1 (de) | 1989-06-28 |
EP0107921A3 (en) | 1986-04-23 |
JPS5960794A (ja) | 1984-04-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |