DE3379133D1 - Adhesion bond-breaking of lift-off regions on semiconductor structures - Google Patents

Adhesion bond-breaking of lift-off regions on semiconductor structures

Info

Publication number
DE3379133D1
DE3379133D1 DE8383401592T DE3379133T DE3379133D1 DE 3379133 D1 DE3379133 D1 DE 3379133D1 DE 8383401592 T DE8383401592 T DE 8383401592T DE 3379133 T DE3379133 T DE 3379133T DE 3379133 D1 DE3379133 D1 DE 3379133D1
Authority
DE
Germany
Prior art keywords
breaking
lift
regions
semiconductor structures
adhesion bond
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383401592T
Other languages
German (de)
English (en)
Inventor
Alvin Milgram
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Application granted granted Critical
Publication of DE3379133D1 publication Critical patent/DE3379133D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H10W20/058—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by depositing on sacrificial masks, e.g. using lift-off
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/202—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials for lift-off processes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/046—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
    • H05K3/048—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer using a lift-off resist pattern or a release layer pattern
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/951—Lift-off
DE8383401592T 1982-08-02 1983-08-01 Adhesion bond-breaking of lift-off regions on semiconductor structures Expired DE3379133D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/404,108 US4428796A (en) 1982-08-02 1982-08-02 Adhesion bond-breaking of lift-off regions on semiconductor structures

Publications (1)

Publication Number Publication Date
DE3379133D1 true DE3379133D1 (en) 1989-03-09

Family

ID=23598195

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383401592T Expired DE3379133D1 (en) 1982-08-02 1983-08-01 Adhesion bond-breaking of lift-off regions on semiconductor structures

Country Status (5)

Country Link
US (1) US4428796A (OSRAM)
EP (1) EP0102281B1 (OSRAM)
JP (1) JPS5944830A (OSRAM)
CA (1) CA1192480A (OSRAM)
DE (1) DE3379133D1 (OSRAM)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4456675A (en) * 1983-07-26 1984-06-26 International Business Machines Corporation Dry process for forming metal patterns wherein metal is deposited on a depolymerizable polymer and selectively removed
US4539222A (en) * 1983-11-30 1985-09-03 International Business Machines Corporation Process for forming metal patterns wherein metal is deposited on a thermally depolymerizable polymer and selectively removed
DE3604368A1 (de) * 1985-02-13 1986-08-14 Sharp K.K., Osaka Verfahren zur herstellung eines duennfilm-transistors
JPS61242044A (ja) * 1985-04-19 1986-10-28 Matsushita Electronics Corp 半導体装置の製造方法
US4853669A (en) * 1985-04-26 1989-08-01 Wisconsin Alumni Research Foundation Sealed cavity semiconductor pressure transducers and method of producing the same
US4744863A (en) * 1985-04-26 1988-05-17 Wisconsin Alumni Research Foundation Sealed cavity semiconductor pressure transducers and method of producing the same
US4606998A (en) * 1985-04-30 1986-08-19 International Business Machines Corporation Barrierless high-temperature lift-off process
US4715109A (en) * 1985-06-12 1987-12-29 Texas Instruments Incorporated Method of forming a high density vertical stud titanium silicide for reachup contact applications
US4886573A (en) * 1986-08-27 1989-12-12 Hitachi, Ltd. Process for forming wiring on substrate
JPH0626201B2 (ja) * 1987-10-15 1994-04-06 富士通株式会社 半導体装置の製造方法
EP0511691A3 (en) * 1988-07-13 1993-03-03 International Business Machines Corporation Wet etching of cured polyimide
US4861425A (en) * 1988-08-22 1989-08-29 International Business Machines Corporation Lift-off process for terminal metals
US6989228B2 (en) 1989-02-27 2006-01-24 Hitachi, Ltd Method and apparatus for processing samples
US5868854A (en) * 1989-02-27 1999-02-09 Hitachi, Ltd. Method and apparatus for processing samples
US5232872A (en) * 1989-05-09 1993-08-03 Fujitsu Limited Method for manufacturing semiconductor device
US5006488A (en) * 1989-10-06 1991-04-09 International Business Machines Corporation High temperature lift-off process
US5059500A (en) * 1990-10-10 1991-10-22 Polaroid Corporation Process for forming a color filter
US5140396A (en) * 1990-10-10 1992-08-18 Polaroid Corporation Filter and solid state imager incorporating this filter
US5244538A (en) * 1991-07-26 1993-09-14 Microelectronics And Computer Technology Corporation Method of patterning metal on a substrate using direct-write deposition of a mask
US5382315A (en) * 1991-02-11 1995-01-17 Microelectronics And Computer Technology Corporation Method of forming etch mask using particle beam deposition
US5350487A (en) * 1993-05-03 1994-09-27 Ameen Thomas J Method of etching polyimide
US5925260A (en) * 1997-01-02 1999-07-20 Micron Technology, Inc. Removal of polyimide from dies and wafers
DE19717363C2 (de) * 1997-04-24 2001-09-06 Siemens Ag Herstellverfahren für eine Platinmetall-Struktur mittels eines Lift-off-Prozesses und Verwendung des Herstellverfahrens
US6656313B2 (en) * 2001-06-11 2003-12-02 International Business Machines Corporation Structure and method for improved adhesion between two polymer films
US20060108322A1 (en) * 2004-11-19 2006-05-25 Wei Wu Lift-off material

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3873361A (en) 1973-11-29 1975-03-25 Ibm Method of depositing thin film utilizing a lift-off mask
US3988256A (en) * 1974-04-03 1976-10-26 Allied Chemical Corporation Photoresist stripper rinse
US4218283A (en) * 1974-08-23 1980-08-19 Hitachi, Ltd. Method for fabricating semiconductor device and etchant for polymer resin
JPS5127464A (ja) * 1974-08-23 1976-03-08 Hitachi Ltd Horiimidokeijushimakuno sentakutekietsuchinguhoho
US4092442A (en) * 1976-12-30 1978-05-30 International Business Machines Corporation Method of depositing thin films utilizing a polyimide mask
US4218532A (en) 1977-10-13 1980-08-19 Bell Telephone Laboratories, Incorporated Photolithographic technique for depositing thin films
JPS5621332A (en) * 1979-07-31 1981-02-27 Fujitsu Ltd Manufacture of semiconductor device
JPS5874041A (ja) * 1981-10-29 1983-05-04 Hitachi Chem Co Ltd ポリイミド系樹脂用エツチング液
US4451971A (en) * 1982-08-02 1984-06-05 Fairchild Camera And Instrument Corporation Lift-off wafer processing

Also Published As

Publication number Publication date
CA1192480A (en) 1985-08-27
JPH0345895B2 (OSRAM) 1991-07-12
EP0102281B1 (en) 1989-02-01
EP0102281A2 (en) 1984-03-07
JPS5944830A (ja) 1984-03-13
US4428796A (en) 1984-01-31
EP0102281A3 (en) 1986-03-26

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Legal Events

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