DE3370563D1 - Power bus routing for gate arrays - Google Patents

Power bus routing for gate arrays

Info

Publication number
DE3370563D1
DE3370563D1 DE8383902340T DE3370563T DE3370563D1 DE 3370563 D1 DE3370563 D1 DE 3370563D1 DE 8383902340 T DE8383902340 T DE 8383902340T DE 3370563 T DE3370563 T DE 3370563T DE 3370563 D1 DE3370563 D1 DE 3370563D1
Authority
DE
Germany
Prior art keywords
gate arrays
power bus
bus routing
routing
arrays
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383902340T
Other languages
English (en)
Inventor
James J Remedi
Don G Reid
Lynette Ure
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=23558128&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE3370563(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of DE3370563D1 publication Critical patent/DE3370563D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/071—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/112—Mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE8383902340T 1982-07-01 1983-06-06 Power bus routing for gate arrays Expired DE3370563D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/394,239 US4511914A (en) 1982-07-01 1982-07-01 Power bus routing for providing noise isolation in gate arrays
PCT/US1983/000890 WO1984000252A1 (en) 1982-07-01 1983-06-06 Power bus routing for gate arrays

Publications (1)

Publication Number Publication Date
DE3370563D1 true DE3370563D1 (en) 1987-04-30

Family

ID=23558128

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383902340T Expired DE3370563D1 (en) 1982-07-01 1983-06-06 Power bus routing for gate arrays

Country Status (6)

Country Link
US (1) US4511914A (de)
EP (1) EP0112894B1 (de)
JP (1) JPH0695553B2 (de)
DE (1) DE3370563D1 (de)
SG (1) SG67289G (de)
WO (1) WO1984000252A1 (de)

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* Cited by examiner, † Cited by third party
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JPS5984542A (ja) * 1982-11-08 1984-05-16 Nec Corp 高周波半導体集積回路
JPS59167049A (ja) * 1983-03-14 1984-09-20 Nec Corp 半導体装置
US4583111A (en) * 1983-09-09 1986-04-15 Fairchild Semiconductor Corporation Integrated circuit chip wiring arrangement providing reduced circuit inductance and controlled voltage gradients
JPS6110269A (ja) * 1984-06-26 1986-01-17 Nec Corp 半導体集積回路
JPS6344742A (ja) * 1986-08-12 1988-02-25 Fujitsu Ltd 半導体装置
JP2936542B2 (ja) * 1990-01-30 1999-08-23 株式会社日立製作所 電源幹線のレイアウト方法
US5063429A (en) * 1990-09-17 1991-11-05 Ncr Corporation High density input/output cell arrangement for integrated circuits
JP2742735B2 (ja) * 1991-07-30 1998-04-22 三菱電機株式会社 半導体集積回路装置およびそのレイアウト設計方法
JP3052519B2 (ja) * 1992-01-14 2000-06-12 日本電気株式会社 集積回路の電源配線設計方法
JP2822781B2 (ja) * 1992-06-11 1998-11-11 三菱電機株式会社 マスタスライス方式半導体集積回路装置
US5389556A (en) * 1992-07-02 1995-02-14 Lsi Logic Corporation Individually powering-up unsingulated dies on a wafer
US5648661A (en) * 1992-07-02 1997-07-15 Lsi Logic Corporation Integrated circuit wafer comprising unsingulated dies, and decoder arrangement for individually testing the dies
US5442282A (en) * 1992-07-02 1995-08-15 Lsi Logic Corporation Testing and exercising individual, unsingulated dies on a wafer
US5532174A (en) * 1994-04-22 1996-07-02 Lsi Logic Corporation Wafer level integrated circuit testing with a sacrificial metal layer
US5757208A (en) * 1996-05-01 1998-05-26 Motorola, Inc. Programmable array and method for routing power busses therein
US6437441B1 (en) * 1997-07-10 2002-08-20 Kawasaki Microelectronics, Inc. Wiring structure of a semiconductor integrated circuit and a method of forming the wiring structure
US6617620B1 (en) 1999-09-29 2003-09-09 Oki Electric Industry Co., Ltd. Gate array with border element
US6598216B2 (en) 2001-08-08 2003-07-22 International Business Machines Corporation Method for enhancing a power bus in I/O regions of an ASIC device
US7750500B2 (en) * 2004-06-28 2010-07-06 Broadcom Corporation Integrated circuit with multiple independent power supply zones
EP2603931B1 (de) * 2010-08-10 2016-03-23 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. Fotoelektrischer siliciummultiplikator mit mehrfachem isochronem auslesen
US8987788B2 (en) 2011-09-26 2015-03-24 Semiconductor Components Industries, Llc Metal-strapped CCD image sensors

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
GB1440512A (en) * 1973-04-30 1976-06-23 Rca Corp Universal array using complementary transistors
US3999214A (en) * 1974-06-26 1976-12-21 Ibm Corporation Wireable planar integrated circuit chip structure
US4161662A (en) * 1976-01-22 1979-07-17 Motorola, Inc. Standardized digital logic chip
JPS5371584A (en) * 1976-12-08 1978-06-26 Hitachi Ltd Semiconductor integrated circuit device
GB1575741A (en) * 1977-01-17 1980-09-24 Philips Electronic Associated Integrated circuits
JPS53140983A (en) * 1977-05-16 1978-12-08 Hitachi Ltd Semiconductor integrated circuit
US4212026A (en) * 1977-06-24 1980-07-08 International Business Machines Corporation Merged array PLA device, circuit, fabrication method and testing technique
JPS5420680A (en) * 1977-07-18 1979-02-16 Hitachi Ltd Large scale integrated circuit
JPS5925381B2 (ja) * 1977-12-30 1984-06-16 富士通株式会社 半導体集積回路装置
US4249193A (en) * 1978-05-25 1981-02-03 International Business Machines Corporation LSI Semiconductor device and fabrication thereof
JPS5582448A (en) * 1978-12-15 1980-06-21 Nec Corp Master slice semiconductor integrated circuit
US4393464A (en) * 1980-12-12 1983-07-12 Ncr Corporation Chip topography for integrated circuit communication controller
JPS57100747A (en) * 1980-12-16 1982-06-23 Nec Corp Semiconductor device
JPS57121250A (en) * 1981-01-20 1982-07-28 Toshiba Corp Semiconductor integrated circuit

Also Published As

Publication number Publication date
WO1984000252A1 (en) 1984-01-19
JPS59501238A (ja) 1984-07-12
EP0112894A4 (de) 1984-09-14
JPH0695553B2 (ja) 1994-11-24
EP0112894B1 (de) 1987-03-25
US4511914A (en) 1985-04-16
EP0112894A1 (de) 1984-07-11
SG67289G (en) 1990-01-26

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Legal Events

Date Code Title Description
8363 Opposition against the patent
8365 Fully valid after opposition proceedings