DE3274607D1 - Transistor circuit - Google Patents
Transistor circuitInfo
- Publication number
- DE3274607D1 DE3274607D1 DE8282304316T DE3274607T DE3274607D1 DE 3274607 D1 DE3274607 D1 DE 3274607D1 DE 8282304316 T DE8282304316 T DE 8282304316T DE 3274607 T DE3274607 T DE 3274607T DE 3274607 D1 DE3274607 D1 DE 3274607D1
- Authority
- DE
- Germany
- Prior art keywords
- transistor circuit
- transistor
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/088—Transistor-transistor logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/013—Modifications for accelerating switching in bipolar transistor circuits
- H03K19/0136—Modifications for accelerating switching in bipolar transistor circuits by means of a pull-up or down element
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56128468A JPS5830233A (ja) | 1981-08-17 | 1981-08-17 | トランジスタ回路 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3274607D1 true DE3274607D1 (en) | 1987-01-15 |
Family
ID=14985469
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282304316T Expired DE3274607D1 (en) | 1981-08-17 | 1982-08-16 | Transistor circuit |
Country Status (5)
Country | Link |
---|---|
US (1) | US4535258A (de) |
EP (1) | EP0072694B1 (de) |
JP (1) | JPS5830233A (de) |
DE (1) | DE3274607D1 (de) |
IE (1) | IE53407B1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59181724A (ja) * | 1983-03-31 | 1984-10-16 | Fujitsu Ltd | ゲ−トアレイlsi装置 |
EP0128603A1 (de) * | 1983-05-13 | 1984-12-19 | Koninklijke Philips Electronics N.V. | TTL-Logikschaltung mit schaltbarer Stromrückkopplung |
JPS63115420A (ja) * | 1986-10-31 | 1988-05-20 | Mitsubishi Electric Corp | バイポ−ラ論理回路 |
NL8801103A (nl) * | 1988-04-28 | 1989-11-16 | Philips Nv | Transistorschakeling met stuurstroombegrenzing. |
JP2820980B2 (ja) * | 1989-11-02 | 1998-11-05 | 富士通株式会社 | 論理回路 |
JP5819212B2 (ja) * | 2012-02-13 | 2015-11-18 | アルプス電気株式会社 | 負荷接続状態検出回路 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1548667A (de) * | 1967-10-27 | 1968-12-06 | ||
JPS4965770A (de) * | 1972-10-26 | 1974-06-26 | ||
DE2545943A1 (de) * | 1975-10-14 | 1977-04-28 | Licentia Gmbh | Gatter |
US4132906A (en) * | 1977-02-28 | 1979-01-02 | Motorola, Inc. | Circuit to improve rise time and/or reduce parasitic power supply spike current in bipolar transistor logic circuits |
JPS54134549A (en) * | 1978-04-10 | 1979-10-19 | Fujitsu Ltd | Logical operation circuit |
JPS54156463A (en) * | 1978-05-30 | 1979-12-10 | Nec Corp | Logic circuit |
JPS55127731A (en) * | 1979-03-26 | 1980-10-02 | Hitachi Ltd | Logical operation circuit |
US4449063A (en) * | 1979-08-29 | 1984-05-15 | Fujitsu Limited | Logic circuit with improved switching |
JPS5696531A (en) * | 1979-12-27 | 1981-08-04 | Fujitsu Ltd | Ttl circuit of open collector |
JPS56122236A (en) * | 1980-02-29 | 1981-09-25 | Nec Corp | Logic gate circuit |
US4413194A (en) * | 1981-07-10 | 1983-11-01 | Motorola, Inc. | TTL Output circuit having means for preventing output voltage excursions induced by negative current reflections |
US4413195A (en) * | 1981-07-10 | 1983-11-01 | Motorola, Inc. | Transistor-transistor-logic circuits having improved breakdown protection circuitry |
-
1981
- 1981-08-17 JP JP56128468A patent/JPS5830233A/ja active Pending
-
1982
- 1982-08-16 DE DE8282304316T patent/DE3274607D1/de not_active Expired
- 1982-08-16 IE IE1979/82A patent/IE53407B1/en unknown
- 1982-08-16 EP EP82304316A patent/EP0072694B1/de not_active Expired
- 1982-08-17 US US06/408,846 patent/US4535258A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0072694B1 (de) | 1986-12-03 |
IE53407B1 (en) | 1988-11-09 |
US4535258A (en) | 1985-08-13 |
JPS5830233A (ja) | 1983-02-22 |
EP0072694A3 (en) | 1984-05-23 |
EP0072694A2 (de) | 1983-02-23 |
IE821979L (en) | 1983-02-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |